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      1 ; RUN: llc -march=hexagon -O2 -verify-machineinstrs < %s | FileCheck %s
      2 
      3 ; CHECK: .globl
      4 
      5 target triple = "hexagon"
      6 
      7 @g0 = private unnamed_addr constant [46 x i8] c"%x :  Q6_R_mpyiacc_RR(INT32_MAX,0,INT32_MAX)\0A\00", align 1
      8 @g1 = private unnamed_addr constant [46 x i8] c"%x :  Q6_R_mpyiacc_RR(INT32_MIN,1,INT32_MAX)\0A\00", align 1
      9 @g2 = private unnamed_addr constant [39 x i8] c"%x :  Q6_R_mpyiacc_RR(-1,1,INT32_MAX)\0A\00", align 1
     10 @g3 = private unnamed_addr constant [38 x i8] c"%x :  Q6_R_mpyiacc_RR(0,1,INT32_MAX)\0A\00", align 1
     11 @g4 = private unnamed_addr constant [38 x i8] c"%x :  Q6_R_mpyiacc_RR(1,1,INT32_MAX)\0A\00", align 1
     12 @g5 = private unnamed_addr constant [46 x i8] c"%x :  Q6_R_mpyiacc_RR(INT32_MAX,1,INT32_MAX)\0A\00", align 1
     13 @g6 = private unnamed_addr constant [54 x i8] c"%x :  Q6_R_mpyiacc_RR(INT32_MIN,INT32_MAX,INT32_MAX)\0A\00", align 1
     14 @g7 = private unnamed_addr constant [47 x i8] c"%x :  Q6_R_mpyiacc_RR(-1,INT32_MAX,INT32_MAX)\0A\00", align 1
     15 @g8 = private unnamed_addr constant [46 x i8] c"%x :  Q6_R_mpyiacc_RR(0,INT32_MAX,INT32_MAX)\0A\00", align 1
     16 @g9 = private unnamed_addr constant [46 x i8] c"%x :  Q6_R_mpyiacc_RR(1,INT32_MAX,INT32_MAX)\0A\00", align 1
     17 @g10 = private unnamed_addr constant [54 x i8] c"%x :  Q6_R_mpyiacc_RR(INT32_MAX,INT32_MAX,INT32_MAX)\0A\00", align 1
     18 
     19 ; Function Attrs: nounwind
     20 declare i32 @f0(i8* nocapture readonly, ...) #0
     21 
     22 ; Function Attrs: nounwind
     23 define i32 @f1() #0 {
     24 b0:
     25   %v0 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 0, i32 2147483647)
     26   %v1 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @g0, i32 0, i32 0), i32 %v0) #2
     27   %v2 = tail call i32 @llvm.hexagon.M2.maci(i32 -2147483648, i32 1, i32 2147483647)
     28   %v3 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @g1, i32 0, i32 0), i32 %v2) #2
     29   %v4 = tail call i32 @llvm.hexagon.M2.maci(i32 -1, i32 1, i32 2147483647)
     30   %v5 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @g2, i32 0, i32 0), i32 %v4) #2
     31   %v6 = tail call i32 @llvm.hexagon.M2.maci(i32 0, i32 1, i32 2147483647)
     32   %v7 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @g3, i32 0, i32 0), i32 %v6) #2
     33   %v8 = tail call i32 @llvm.hexagon.M2.maci(i32 1, i32 1, i32 2147483647)
     34   %v9 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @g4, i32 0, i32 0), i32 %v8) #2
     35   %v10 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 1, i32 2147483647)
     36   %v11 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @g5, i32 0, i32 0), i32 %v10) #2
     37   %v12 = tail call i32 @llvm.hexagon.M2.maci(i32 -2147483648, i32 2147483647, i32 2147483647)
     38   %v13 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @g6, i32 0, i32 0), i32 %v12) #2
     39   %v14 = tail call i32 @llvm.hexagon.M2.maci(i32 -1, i32 2147483647, i32 2147483647)
     40   %v15 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @g7, i32 0, i32 0), i32 %v14) #2
     41   %v16 = tail call i32 @llvm.hexagon.M2.maci(i32 0, i32 2147483647, i32 2147483647)
     42   %v17 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @g8, i32 0, i32 0), i32 %v16) #2
     43   %v18 = tail call i32 @llvm.hexagon.M2.maci(i32 1, i32 2147483647, i32 2147483647)
     44   %v19 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @g9, i32 0, i32 0), i32 %v18) #2
     45   %v20 = tail call i32 @llvm.hexagon.M2.maci(i32 2147483647, i32 2147483647, i32 2147483647)
     46   %v21 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @g10, i32 0, i32 0), i32 %v20) #2
     47   ret i32 0
     48 }
     49 
     50 ; Function Attrs: nounwind readnone
     51 declare i32 @llvm.hexagon.M2.maci(i32, i32, i32) #1
     52 
     53 attributes #0 = { nounwind "target-cpu"="hexagonv55" }
     54 attributes #1 = { nounwind readnone }
     55 attributes #2 = { nounwind }
     56