1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 ; CHECK-NOT: .sdata.4.g0,"aM" 3 4 target triple = "hexagon-unknown--elf" 5 6 %s.0 = type { i32 } 7 8 @g0 = global %s.0 { i32 3 }, align 4 #0 9 @g1 = global i32 0, align 4 #1 10 @g2 = global %s.0* @g0, align 4 #2 11 @g3 = global i32 0, align 4 #3 12 @g4 = global i32 0, align 4 #4 13 14 ; Function Attrs: nounwind optsize 15 define i32 @f0() #5 section ".text.main" { 16 b0: 17 %v0 = load i32, i32* @g3, align 4, !tbaa !4 18 %v1 = add nsw i32 %v0, 1 19 store i32 %v1, i32* @g3, align 4, !tbaa !4 20 %v2 = load i8*, i8** bitcast (%s.0** @g2 to i8**), align 4, !tbaa !8 21 %v3 = load i32, i32* @g1, align 4, !tbaa !10 22 %v4 = getelementptr inbounds i8, i8* %v2, i32 %v3 23 %v5 = bitcast i8* %v4 to i32* 24 %v6 = load i32, i32* %v5, align 4, !tbaa !4 25 store i32 %v6, i32* @g4, align 4, !tbaa !4 26 store i32 1, i32* @g3, align 4, !tbaa !4 27 ret i32 0 28 } 29 30 attributes #0 = { "linker_input_section"=".sdata.4.cccc" "linker_output_section"=".sdata.4" } 31 attributes #1 = { "linker_input_section"=".sbss.4.np" "linker_output_section"=".sbss.4" } 32 attributes #2 = { "linker_input_section"=".sdata.4.cp" "linker_output_section"=".sdata.4" } 33 attributes #3 = { "linker_input_section"=".sbss.4.counter" "linker_output_section"=".sbss.4" } 34 attributes #4 = { "linker_input_section"=".sbss.4.value" "linker_output_section"=".sbss.4" } 35 attributes #5 = { nounwind optsize "target-cpu"="hexagonv55" } 36 37 !llvm.module.flags = !{!0, !2} 38 39 !0 = !{i32 6, !"Target CPU", !1} 40 !1 = !{!"hexagonv55"} 41 !2 = !{i32 6, !"Target Features", !3} 42 !3 = !{!"-hvx"} 43 !4 = !{!5, !5, i64 0} 44 !5 = !{!"int", !6, i64 0} 45 !6 = !{!"omnipotent char", !7, i64 0} 46 !7 = !{!"Simple C/C++ TBAA"} 47 !8 = !{!9, !9, i64 0} 48 !9 = !{!"any pointer", !6, i64 0} 49 !10 = !{!6, !6, i64 0} 50
