1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 ; CHECK: dcfetch 3 ; CHECK: dcfetch{{.*}}#8 4 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32" 5 target triple = "hexagon" 6 7 ; Function Attrs: nounwind 8 define zeroext i8 @foo(i8* %addr) #0 { 9 entry: 10 %addr.addr = alloca i8*, align 4 11 store i8* %addr, i8** %addr.addr, align 4 12 %0 = load i8*, i8** %addr.addr, align 4 13 call void @llvm.prefetch(i8* %0, i32 0, i32 3, i32 1) 14 %1 = load i8*, i8** %addr.addr, align 4 15 %2 = bitcast i8* %1 to i32* 16 %3 = load i32, i32* %2, align 4 17 %4 = add i32 %3, 8 18 %5 = inttoptr i32 %4 to i8* 19 call void @llvm.hexagon.prefetch(i8* %5) 20 %6 = load i8, i8* %5 21 ret i8 %6 22 } 23 24 ; Function Attrs: nounwind 25 declare void @llvm.prefetch(i8* nocapture, i32, i32, i32) #1 26 declare void @llvm.hexagon.prefetch(i8* nocapture) #1 27 28 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } 29 attributes #1 = { nounwind } 30
