1 ; RUN: llc -march=hexagon -mcpu=hexagonv55 < %s | FileCheck %s 2 ; Check that the packetizer generates valid packets with constant 3 ; extended add and base+offset store instructions. 4 5 ; CHECK: r{{[0-9]+}} = add(r{{[0-9]+}},##200000) 6 ; CHECK-NEXT: memw(r{{[0-9]+}}+##12000) = r{{[0-9]+}}.new 7 ; CHECK-NEXT: } 8 9 ; RUN: llc -march=hexagon -mcpu=hexagonv60 < %s | FileCheck %s -check-prefix=CHECK-NEW 10 ; Check that the packetizer generates .new store for v60 which has BSB scheduling model. 11 12 ; CHECK-NEW: [[REG0:r([0-9]+)]] = add(r{{[0-9]+}},##200000) 13 ; CHECK-NEW: memw(r{{[0-9]+}}+##12000) = [[REG0]].new 14 15 define void @test(i32* nocapture %a, i32* nocapture %b, i32 %c) nounwind { 16 entry: 17 %0 = load i32, i32* %a, align 4 18 %add1 = add nsw i32 %0, 200000 19 %arrayidx2 = getelementptr inbounds i32, i32* %a, i32 3000 20 store i32 %add1, i32* %arrayidx2, align 4 21 ret void 22 } 23
