1 ; RUN: llc -O2 -march=hexagon < %s | FileCheck %s 2 ; Rely on the comments generated by llc. Make sure there are no add/addasl 3 ; instructions in while.body13 (before the loads). 4 ; CHECK: while.body13 5 ; CHECK-NOT: add 6 ; CHECK: memw 7 8 %struct.1 = type { i32, i32 } 9 %struct.2 = type { [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [3 x i32], [24 x i32], [8 x %struct.1], [5 x i32] } 10 11 @A1 = global i64 zeroinitializer 12 @A2 = global i64 zeroinitializer 13 @B1 = global i32 zeroinitializer 14 @B2 = global i32 zeroinitializer 15 @C1 = global i8 zeroinitializer 16 17 declare i32 @llvm.hexagon.S2.cl0(i32) nounwind readnone 18 declare i32 @llvm.hexagon.S2.setbit.r(i32, i32) nounwind readnone 19 declare i64 @llvm.hexagon.M2.vmpy2s.s0(i32, i32) nounwind readnone 20 declare i64 @llvm.hexagon.M2.vmac2s.s0(i64, i32, i32) nounwind readnone 21 declare i64 @llvm.hexagon.A2.vaddws(i64, i64) nounwind readnone 22 declare i64 @llvm.hexagon.A2.vsubws(i64, i64) nounwind readnone 23 declare i32 @llvm.hexagon.A4.modwrapu(i32, i32) nounwind readnone 24 25 define void @foo(i32 %n) nounwind { 26 entry: 27 br label %while.body 28 29 while.body: 30 %count = phi i32 [ 0, %entry ], [ %next, %while.end ] 31 %idx = phi i32 [ 0, %entry ], [ %15, %while.end ] 32 %0 = load i32, i32* @B1, align 4 33 %1 = load i32, i32* @B2, align 8 34 %2 = and i32 %1, %0 35 br label %while.body13 36 37 while.body13: ; preds = %while.body, %if.end 38 %3 = phi i64 [ %13, %if.end ], [ 0, %while.body ] 39 %4 = phi i64 [ %14, %if.end ], [ 0, %while.body ] 40 %m = phi i32 [ %6, %if.end ], [ %2, %while.body ] 41 %5 = tail call i32 @llvm.hexagon.S2.cl0(i32 %m) 42 %6 = tail call i32 @llvm.hexagon.S2.setbit.r(i32 %m, i32 %5) 43 %cgep85 = getelementptr [10 x %struct.2], [10 x %struct.2]* inttoptr (i32 -121502345 to [10 x %struct.2]*), i32 0, i32 %idx 44 %cgep90 = getelementptr %struct.2, %struct.2* %cgep85, i32 0, i32 12, i32 %5 45 %7 = load i32, i32* %cgep90, align 4 46 %8 = tail call i64 @llvm.hexagon.M2.vmpy2s.s0(i32 %7, i32 %7) 47 %cgep91 = getelementptr %struct.2, %struct.2* %cgep85, i32 0, i32 13, i32 %5 48 %9 = load i32, i32* %cgep91, align 4 49 %10 = tail call i64 @llvm.hexagon.M2.vmac2s.s0(i64 %8, i32 %9, i32 %9) 50 %11 = load i8, i8* @C1, align 1 51 %and24 = and i8 %11, 1 52 %cmp = icmp eq i8 %and24, 0 53 br i1 %cmp, label %if.then, label %if.end 54 55 if.then: ; preds = %while.body13 56 %12 = tail call i64 @llvm.hexagon.A2.vaddws(i64 %3, i64 %10) 57 store i64 %12, i64* @A1, align 8 58 br label %if.end 59 60 if.end: ; preds = %if.then, %while.body13 61 %13 = phi i64 [ %12, %if.then ], [ %3, %while.body13 ] 62 %14 = tail call i64 @llvm.hexagon.A2.vsubws(i64 %4, i64 %10) 63 %tobool12 = icmp eq i32 %6, 0 64 br i1 %tobool12, label %while.end, label %while.body13 65 66 while.end: 67 %add40 = add i32 %idx, 1 68 %15 = tail call i32 @llvm.hexagon.A4.modwrapu(i32 %add40, i32 10) nounwind 69 %next = add i32 %count, 1 70 %cc = icmp eq i32 %next, %n 71 br i1 %cc, label %end, label %while.body 72 73 end: 74 store i64 %10, i64* @A2, align 8 75 ret void 76 } 77
