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      1 ; RUN: llc -march=hexagon -O2 < %s
      2 ; REQUIRES: asserts
      3 
      4 target triple = "hexagon-unknown--elf"
      5 
      6 %struct.cpumask = type { [1 x i32] }
      7 %struct.load_weight = type { i32, i32 }
      8 
      9 @sysctl_sched_latency = global i32 6000000, align 4
     10 @normalized_sysctl_sched_latency = global i32 6000000, align 4
     11 @sysctl_sched_tunable_scaling = global i8 1, align 1
     12 @sysctl_sched_min_granularity = global i32 750000, align 4
     13 @normalized_sysctl_sched_min_granularity = global i32 750000, align 4
     14 @sysctl_sched_wakeup_granularity = global i32 1000000, align 4
     15 @normalized_sysctl_sched_wakeup_granularity = global i32 1000000, align 4
     16 @sysctl_sched_migration_cost = constant i32 500000, align 4
     17 @sysctl_sched_shares_window = global i32 10000000, align 4
     18 @sysctl_sched_child_runs_first = common global i32 0, align 4
     19 @cpu_online_mask = external constant %struct.cpumask*
     20 
     21 ; Function Attrs: noinline nounwind
     22 define void @sched_init_granularity() #0 {
     23 entry:
     24   tail call fastcc void @update_sysctl()
     25   ret void
     26 }
     27 
     28 ; Function Attrs: noinline nounwind
     29 define internal fastcc void @update_sysctl() #0 {
     30 entry:
     31   %call = tail call i32 @get_update_sysctl_factor()
     32   %0 = load i32, i32* @normalized_sysctl_sched_min_granularity, align 4, !tbaa !1
     33   %mul = mul i32 %0, %call
     34   store i32 %mul, i32* @sysctl_sched_min_granularity, align 4, !tbaa !1
     35   %1 = load i32, i32* @normalized_sysctl_sched_latency, align 4, !tbaa !1
     36   %mul1 = mul i32 %1, %call
     37   store i32 %mul1, i32* @sysctl_sched_latency, align 4, !tbaa !1
     38   %2 = load i32, i32* @normalized_sysctl_sched_wakeup_granularity, align 4, !tbaa !1
     39   %mul2 = mul i32 %2, %call
     40   store i32 %mul2, i32* @sysctl_sched_wakeup_granularity, align 4, !tbaa !1
     41   ret void
     42 }
     43 
     44 ; Function Attrs: noinline nounwind
     45 define i32 @calc_delta_mine(i32 %delta_exec, i32 %weight, %struct.load_weight* nocapture %lw) #0 {
     46 entry:
     47   %cmp = icmp ugt i32 %weight, 1
     48   %conv = zext i32 %delta_exec to i64
     49   br i1 %cmp, label %if.then, label %if.end, !prof !5
     50 
     51 if.then:                                          ; preds = %entry
     52   %conv2 = zext i32 %weight to i64
     53   %mul = mul i64 %conv2, %conv
     54   br label %if.end
     55 
     56 if.end:                                           ; preds = %entry, %if.then
     57   %tmp.0 = phi i64 [ %mul, %if.then ], [ %conv, %entry ]
     58   %inv_weight = getelementptr inbounds %struct.load_weight, %struct.load_weight* %lw, i32 0, i32 1
     59   %0 = load i32, i32* %inv_weight, align 4, !tbaa !6
     60   %tobool4 = icmp eq i32 %0, 0
     61   br i1 %tobool4, label %if.then5, label %if.end22
     62 
     63 if.then5:                                         ; preds = %if.end
     64   %weight7 = getelementptr inbounds %struct.load_weight, %struct.load_weight* %lw, i32 0, i32 0
     65   %1 = load i32, i32* %weight7, align 4, !tbaa !9
     66   %lnot9 = icmp eq i32 %1, 0
     67   br i1 %lnot9, label %if.then17, label %if.else19, !prof !10
     68 
     69 if.then17:                                        ; preds = %if.then5
     70   store i32 -1, i32* %inv_weight, align 4, !tbaa !6
     71   br label %if.end22
     72 
     73 if.else19:                                        ; preds = %if.then5
     74   %div = udiv i32 -1, %1
     75   store i32 %div, i32* %inv_weight, align 4, !tbaa !6
     76   br label %if.end22
     77 
     78 if.end22:                                         ; preds = %if.end, %if.then17, %if.else19
     79   %2 = phi i32 [ %0, %if.end ], [ -1, %if.then17 ], [ %div, %if.else19 ]
     80   %cmp23 = icmp ugt i64 %tmp.0, 4294967295
     81   br i1 %cmp23, label %if.then31, label %if.else37, !prof !10
     82 
     83 if.then31:                                        ; preds = %if.end22
     84   %add = add i64 %tmp.0, 32768
     85   %shr = lshr i64 %add, 16
     86   %conv33 = zext i32 %2 to i64
     87   %mul34 = mul i64 %conv33, %shr
     88   %add35 = add i64 %mul34, 32768
     89   %shr36 = lshr i64 %add35, 16
     90   br label %if.end43
     91 
     92 if.else37:                                        ; preds = %if.end22
     93   %conv39 = zext i32 %2 to i64
     94   %mul40 = mul i64 %conv39, %tmp.0
     95   %add41 = add i64 %mul40, 2147483648
     96   %shr42 = lshr i64 %add41, 32
     97   br label %if.end43
     98 
     99 if.end43:                                         ; preds = %if.else37, %if.then31
    100   %tmp.1 = phi i64 [ %shr36, %if.then31 ], [ %shr42, %if.else37 ]
    101   %cmp49 = icmp ult i64 %tmp.1, 2147483647
    102   %3 = trunc i64 %tmp.1 to i32
    103   %conv51 = select i1 %cmp49, i32 %3, i32 2147483647
    104   ret i32 %conv51
    105 }
    106 
    107 declare i32 @get_update_sysctl_factor() #0
    108 declare i32 @__bitmap_weight(i32*, i32) #0
    109 
    110 attributes #0 = { noinline nounwind }
    111 
    112 !1 = !{!2, !2, i64 0}
    113 !2 = !{!"int", !3, i64 0}
    114 !3 = !{!"omnipotent char", !4, i64 0}
    115 !4 = !{!"Simple C/C++ TBAA"}
    116 !5 = !{!"branch_weights", i32 64, i32 4}
    117 !6 = !{!7, !8, i64 4}
    118 !7 = !{!"load_weight", !8, i64 0, !8, i64 4}
    119 !8 = !{!"long", !3, i64 0}
    120 !9 = !{!7, !8, i64 0}
    121 !10 = !{!"branch_weights", i32 4, i32 64}
    122 !11 = !{!12, !12, i64 0}
    123 !12 = !{!"any pointer", !3, i64 0}
    124 !13 = !{!3, !3, i64 0}
    125 !14 = !{i32 45854, i32 45878}
    126