1 # RUN: llc -march=hexagon -run-pass expand-condsets -expand-condsets-coa-limit=0 -o - %s -verify-machineinstrs | FileCheck %s 2 3 # CHECK-LABEL: name: fred 4 5 --- | 6 define void @fred() { ret void } 7 8 ... 9 --- 10 11 name: fred 12 tracksRegLiveness: true 13 registers: 14 - { id: 0, class: predregs } 15 - { id: 1, class: intregs } 16 - { id: 2, class: intregs } 17 - { id: 3, class: intregs } 18 19 body: | 20 bb.0: 21 liveins: $r0, $r1, $r2, $p0 22 %0 = COPY $p0 23 %0 = COPY $p0 ; Cheat: convince MIR parser that this is not SSA. 24 %1 = COPY $r1 25 ; Make sure we do not expand/predicate a mux with identical inputs. 26 ; CHECK-NOT: A2_paddit 27 %2 = A2_addi %1, 1 28 %3 = C2_mux %0, killed %2, %2 29 $r0 = COPY %3 30 31 ... 32 33
