1 ; RUN: llc -O2 -march=hexagon -fp-contract=fast -pipeliner-prune-loop-carried=false < %s | FileCheck %s 2 3 ; Test that there is 1 packet between the FP result and its use. 4 5 ; CHECK: loop0([[LOOP0:.LBB[0-9_]+]], 6 ; CHECK: [[LOOP0]] 7 ; CHECK: [[REG0:(r[0-9]+)]] += sfmpy(r{{[0-9]+}},r{{[0-9]+}}) 8 ; CHECK: } 9 ; CHECK: } 10 ; CHECK: r{{[0-9]+}} = {{.*}}[[REG0]] 11 12 ; Function Attrs: nounwind readnone 13 define void @f0(i32 %a0, i32 %a1) #0 { 14 b0: 15 %v0 = alloca [1000 x float], align 64 16 %v1 = alloca [1000 x float], align 64 17 %v2 = alloca [1000 x float], align 64 18 %v3 = alloca [1000 x float], align 64 19 %v4 = bitcast [1000 x float]* %v0 to i8* 20 call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v4) #2 21 %v5 = bitcast [1000 x float]* %v1 to i8* 22 call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v5) #2 23 %v6 = bitcast [1000 x float]* %v2 to i8* 24 call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v6) #2 25 %v7 = bitcast [1000 x float]* %v3 to i8* 26 call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v7) #2 27 %v8 = icmp sgt i32 %a1, 0 28 %v9 = add i32 %a1, -1 29 %v10 = getelementptr [1000 x float], [1000 x float]* %v3, i32 0, i32 0 30 br label %b1 31 32 b1: ; preds = %b3, %b0 33 %v11 = phi i32 [ 0, %b0 ], [ %v34, %b3 ] 34 br i1 %v8, label %b2, label %b3 35 36 b2: ; preds = %b2, %b1 37 %v12 = phi float* [ %v33, %b2 ], [ %v10, %b1 ] 38 %v13 = phi i32 [ %v31, %b2 ], [ 0, %b1 ] 39 %v14 = mul nsw i32 %v13, %a1 40 %v15 = add nsw i32 %v14, %v11 41 %v16 = getelementptr inbounds [1000 x float], [1000 x float]* %v1, i32 0, i32 %v15 42 %v17 = load float, float* %v16, align 4, !tbaa !0 43 %v18 = fmul float %v17, %v17 44 %v19 = mul nsw i32 %v13, 25 45 %v20 = add nsw i32 %v19, %v11 46 %v21 = getelementptr inbounds [1000 x float], [1000 x float]* %v2, i32 0, i32 %v20 47 %v22 = load float, float* %v21, align 4, !tbaa !0 48 %v23 = fmul float %v22, %v22 49 %v24 = fadd float %v18, %v23 50 %v25 = load float, float* %v12, align 4, !tbaa !0 51 %v26 = fmul float %v25, %v25 52 %v27 = fadd float %v24, %v26 53 %v28 = getelementptr inbounds [1000 x float], [1000 x float]* %v0, i32 0, i32 %v20 54 %v29 = load float, float* %v28, align 4, !tbaa !0 55 %v30 = fadd float %v29, %v27 56 store float %v30, float* %v28, align 4, !tbaa !0 57 %v31 = add nuw nsw i32 %v13, 1 58 %v32 = icmp eq i32 %v13, %v9 59 %v33 = getelementptr float, float* %v12, i32 1 60 br i1 %v32, label %b3, label %b2 61 62 b3: ; preds = %b2, %b1 63 %v34 = add nuw nsw i32 %v11, 1 64 %v35 = icmp eq i32 %v34, 25 65 br i1 %v35, label %b4, label %b1 66 67 b4: ; preds = %b3 68 call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v7) #2 69 call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v6) #2 70 call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v5) #2 71 call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v4) #2 72 ret void 73 } 74 75 ; Function Attrs: argmemonly nounwind 76 declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1 77 78 ; Function Attrs: argmemonly nounwind 79 declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1 80 81 attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 82 attributes #1 = { argmemonly nounwind } 83 attributes #2 = { nounwind } 84 85 !0 = !{!1, !1, i64 0} 86 !1 = !{!"float", !2, i64 0} 87 !2 = !{!"omnipotent char", !3, i64 0} 88 !3 = !{!"Simple C/C++ TBAA"} 89
