1 ; RUN: opt -march=hexagon -hexagon-loop-idiom -S < %s | FileCheck %s 2 3 ; Make sure we don't convert load/store loops into memcpy if the access type 4 ; is a vector. Using vector instructions is generally better in such cases. 5 6 ; CHECK-NOT: @llvm.memcpy 7 8 %s.0 = type { i32 } 9 10 define void @f0(%s.0* noalias %a0, %s.0* noalias %a1) #0 align 2 { 11 b0: 12 br i1 undef, label %b1, label %b2 13 14 b1: ; preds = %b1, %b0 15 %v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ] 16 %v1 = mul nuw nsw i32 %v0, 64 17 %v2 = getelementptr %s.0, %s.0* %a0, i32 %v1 18 %v3 = getelementptr %s.0, %s.0* %a1, i32 %v1 19 %v4 = bitcast %s.0* %v2 to <64 x i32>* 20 %v5 = load <64 x i32>, <64 x i32>* %v4, align 256 21 %v6 = bitcast %s.0* %v3 to <64 x i32>* 22 store <64 x i32> %v5, <64 x i32>* %v6, align 256 23 %v7 = add nuw nsw i32 %v0, 1 24 br i1 undef, label %b1, label %b2 25 26 b2: ; preds = %b1, %b0 27 ret void 28 } 29 30 attributes #0 = { "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } 31
