1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 3 ; CHECK: { 4 ; CHECK: jump .LBB0_ 5 ; CHECK: r{{[0-9]+}} = 6 ; CHECK: memw 7 ; CHECK: } 8 9 target triple = "hexagon-unknown--elf" 10 11 %s.0 = type { i8, i8, i8, [6 x i32] } 12 %s.1 = type { %s.2 } 13 %s.2 = type { i32, i8* } 14 %s.3 = type <{ i8*, i8*, i16, i8, i8, i8 }> 15 16 @g0 = internal global [2 x %s.0] [%s.0 { i8 0, i8 6, i8 7, [6 x i32] zeroinitializer }, %s.0 { i8 0, i8 6, i8 7, [6 x i32] zeroinitializer }], align 8 17 @g1 = internal constant [60 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", section "xxxxxxxxxxx.rodata.", align 4 18 @g2 = internal constant %s.1 { %s.2 { i32 24, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @g1, i32 0, i32 0) } }, section ".rodata.xxxxxxxxxx.", align 4 19 @g3 = internal constant [115 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", section "xxxxxxxxxxx.rodata.", align 4 20 @g4 = internal constant %s.3 <{ i8* getelementptr inbounds ([120 x i8], [120 x i8]* @g5, i32 0, i32 0), i8* getelementptr inbounds ([31 x i8], [31 x i8]* @g6, i32 0, i32 0), i16 215, i8 4, i8 0, i8 1 }>, align 1 21 @g5 = private unnamed_addr constant [120 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1 22 @g6 = private unnamed_addr constant [31 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1 23 @g7 = internal constant %s.3 <{ i8* getelementptr inbounds ([120 x i8], [120 x i8]* @g5, i32 0, i32 0), i8* getelementptr inbounds ([91 x i8], [91 x i8]* @g8, i32 0, i32 0), i16 225, i8 2, i8 2, i8 2 }>, align 1 24 @g8 = private unnamed_addr constant [91 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1 25 @g9 = internal constant %s.3 <{ i8* getelementptr inbounds ([120 x i8], [120 x i8]* @g5, i32 0, i32 0), i8* getelementptr inbounds ([109 x i8], [109 x i8]* @g10, i32 0, i32 0), i16 233, i8 2, i8 2, i8 4 }>, align 1 26 @g10 = private unnamed_addr constant [109 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1 27 @g11 = internal constant [116 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", section "xxxxxxxxxxx.rodata.", align 4 28 @g12 = internal constant [134 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", section "xxxxxxxxxxx.rodata.", align 4 29 @g13 = internal constant %s.3 <{ i8* getelementptr inbounds ([120 x i8], [120 x i8]* @g5, i32 0, i32 0), i8* getelementptr inbounds ([31 x i8], [31 x i8]* @g6, i32 0, i32 0), i16 264, i8 4, i8 0, i8 1 }>, align 1 30 @g14 = internal constant [116 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", section "xxxxxxxxxxx.rodata.", align 4 31 @g15 = internal constant [134 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", section "xxxxxxxxxxx.rodata.", align 4 32 33 ; Function Attrs: nounwind 34 define zeroext i8 @f0(i8 zeroext %a0, i8 zeroext %a1, i8* nocapture %a2) #0 { 35 b0: 36 store i8 -1, i8* %a2, align 1, !tbaa !0 37 %v0 = zext i8 %a0 to i32 38 %v1 = icmp ugt i8 %a0, 7 39 %v2 = zext i8 %a1 to i32 40 %v3 = icmp ugt i8 %a1, 5 41 %v4 = or i1 %v1, %v3 42 br i1 %v4, label %b1, label %b2 43 44 b1: ; preds = %b0 45 tail call void @f1(%s.1* @g2, i32 2, i32 %v0, i32 %v2) 46 br label %b12 47 48 b2: ; preds = %b0 49 %v5 = load i8, i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 0, i32 2), align 2, !tbaa !0 50 %v6 = icmp eq i8 %v5, %a0 51 %v7 = load i8, i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 1, i32 2), align 2, !tbaa !0 52 %v8 = icmp eq i8 %v7, %a0 53 %v9 = and i1 %v6, %v8 54 br i1 %v9, label %b3, label %b4 55 56 b3: ; preds = %b2 57 %v10 = getelementptr inbounds [2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 0, i32 3, i32 %v2 58 %v11 = load i32, i32* %v10, align 4, !tbaa !3 59 %v12 = getelementptr inbounds [2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 1, i32 3, i32 %v2 60 %v13 = load i32, i32* %v12, align 4, !tbaa !3 61 tail call void @f1(%s.1* @g2, i32 2, i32 %v0, i32 %v2) 62 br label %b12 63 64 b4: ; preds = %b2 65 %v14 = load i8, i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 0, i32 0), align 8, !tbaa !0 66 %v15 = icmp eq i8 %v14, 1 67 %v16 = and i1 %v15, %v6 68 br i1 %v16, label %b5, label %b8 69 70 b5: ; preds = %b4 71 store i8 0, i8* %a2, align 1, !tbaa !0 72 %v17 = getelementptr inbounds [2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 0, i32 3, i32 %v2 73 %v18 = tail call i32 asm sideeffect "1: $0 = memw_locked($2)\0A $0 = add($0, $3)\0A memw_locked($2, p0) = $0\0A if !p0 jump 1b\0A", "=&r,=*m,r,r,*m,~{p0}"(i32* %v17, i32* %v17, i32 1, i32* %v17) #0, !srcloc !5 74 %v19 = load i32, i32* %v17, align 4, !tbaa !3 75 %v20 = icmp eq i32 %v19, 255 76 br i1 %v20, label %b6, label %b7 77 78 b6: ; preds = %b5 79 tail call void @f2(%s.3* @g4, i32 %v2) #2 80 unreachable 81 82 b7: ; preds = %b5 83 store i8 %a1, i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 0, i32 1), align 1, !tbaa !0 84 %v21 = load i8, i8* %a2, align 1, !tbaa !0 85 %v22 = zext i8 %v21 to i32 86 tail call void @f3(%s.3* @g7, i32 %v2, i32 %v22) #0 87 %v23 = load i32, i32* bitcast ([2 x %s.0]* @g0 to i32*), align 8 88 %v24 = and i32 %v23, 255 89 %v25 = lshr i32 %v23, 8 90 %v26 = and i32 %v25, 255 91 %v27 = lshr i32 %v23, 16 92 %v28 = and i32 %v27, 255 93 %v29 = load i32, i32* %v17, align 4, !tbaa !3 94 tail call void @f4(%s.3* @g9, i32 %v24, i32 %v26, i32 %v28, i32 %v29) #0 95 %v30 = load i8, i8* %a2, align 1, !tbaa !0 96 %v31 = zext i8 %v30 to i32 97 tail call void @f1(%s.1* @g2, i32 2, i32 %v0, i32 %v2) 98 %v32 = load i32, i32* bitcast ([2 x %s.0]* @g0 to i32*), align 8 99 %v33 = and i32 %v32, 255 100 %v34 = lshr i32 %v32, 8 101 %v35 = and i32 %v34, 255 102 %v36 = lshr i32 %v32, 16 103 %v37 = and i32 %v36, 255 104 %v38 = load i32, i32* %v17, align 4, !tbaa !3 105 tail call void @f1(%s.1* @g2, i32 2, i32 %v0, i32 %v2) 106 br label %b12 107 108 b8: ; preds = %b4 109 %v39 = load i8, i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 1, i32 0), align 4, !tbaa !0 110 %v40 = icmp eq i8 %v39, 1 111 %v41 = and i1 %v40, %v8 112 br i1 %v41, label %b9, label %b12 113 114 b9: ; preds = %b8 115 store i8 1, i8* %a2, align 1, !tbaa !0 116 %v42 = getelementptr inbounds [2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 1, i32 3, i32 %v2 117 %v43 = tail call i32 asm sideeffect "1: $0 = memw_locked($2)\0A $0 = add($0, $3)\0A memw_locked($2, p0) = $0\0A if !p0 jump 1b\0A", "=&r,=*m,r,r,*m,~{p0}"(i32* %v42, i32* %v42, i32 1, i32* %v42) #0, !srcloc !5 118 %v44 = load i32, i32* %v42, align 4, !tbaa !3 119 %v45 = icmp eq i32 %v44, 255 120 br i1 %v45, label %b10, label %b11 121 122 b10: ; preds = %b9 123 tail call void @f2(%s.3* @g13, i32 %v2) #2 124 unreachable 125 126 b11: ; preds = %b9 127 store i8 %a1, i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 1, i32 1), align 1, !tbaa !0 128 %v46 = load i8, i8* %a2, align 1, !tbaa !0 129 %v47 = zext i8 %v46 to i32 130 tail call void @f1(%s.1* @g2, i32 2, i32 %v0, i32 %v2) 131 %v48 = load i32, i32* bitcast (i8* getelementptr inbounds ([2 x %s.0], [2 x %s.0]* @g0, i32 0, i32 1, i32 0) to i32*), align 4 132 %v49 = and i32 %v48, 255 133 %v50 = lshr i32 %v48, 8 134 %v51 = and i32 %v50, 255 135 %v52 = lshr i32 %v48, 16 136 %v53 = and i32 %v52, 255 137 %v54 = load i32, i32* %v42, align 4, !tbaa !3 138 tail call void @f1(%s.1* @g2, i32 2, i32 %v0, i32 %v2) 139 br label %b12 140 141 b12: ; preds = %b11, %b8, %b7, %b3, %b1 142 %v55 = phi i8 [ 0, %b1 ], [ 0, %b3 ], [ 1, %b7 ], [ 1, %b11 ], [ 0, %b8 ] 143 ret i8 %v55 144 } 145 146 declare void @f1(%s.1*, i32, i32, i32) 147 148 ; Function Attrs: noreturn 149 declare void @f2(%s.3*, i32) #1 150 151 declare void @f3(%s.3*, i32, i32) 152 153 declare void @f4(%s.3*, i32, i32, i32, i32) 154 155 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 156 attributes #1 = { noreturn } 157 attributes #2 = { noreturn nounwind } 158 159 !0 = !{!1, !1, i64 0} 160 !1 = !{!"omnipotent char", !2} 161 !2 = !{!"Simple C/C++ TBAA"} 162 !3 = !{!4, !4, i64 0} 163 !4 = !{!"long", !1} 164 !5 = !{i32 86170, i32 86211, i32 86247, i32 86291} 165
