1 ; RUN: llc -march=hexagon < %s 2 ; REQUIRES: asserts 3 4 target triple = "hexagon" 5 6 ; Function Attrs: nounwind 7 define void @f0() #0 { 8 b0: 9 br label %b1 10 11 b1: ; preds = %b0 12 br i1 undef, label %b2, label %b3 13 14 b2: ; preds = %b1 15 %v0 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> undef) 16 store <32 x i32> %v0, <32 x i32>* undef, align 128 17 unreachable 18 19 b3: ; preds = %b1 20 ret void 21 } 22 23 ; Function Attrs: nounwind readnone 24 declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #1 25 26 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } 27 attributes #1 = { nounwind readnone } 28
