1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 ; 3 ; Check that this testcase doesn't crash. 4 ; CHECK: vadd 5 6 target triple = "hexagon" 7 8 define void @fred() #0 { 9 b0: 10 br label %b1 11 12 b1: ; preds = %b7, %b0 13 %v2 = phi i32 [ 0, %b0 ], [ %v16, %b7 ] 14 %v3 = phi <32 x i32> [ undef, %b0 ], [ %v15, %b7 ] 15 %v4 = icmp slt i32 %v2, undef 16 br i1 %v4, label %b5, label %b7 17 18 b5: ; preds = %b1 19 %v6 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v3, <32 x i32> undef) 20 br label %b7 21 22 b7: ; preds = %b5, %b1 23 %v8 = phi <32 x i32> [ %v6, %b5 ], [ %v3, %b1 ] 24 %v9 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v8, <32 x i32> undef) 25 %v10 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v9, <32 x i32> undef) 26 %v11 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v10, <32 x i32> undef) 27 %v12 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v11, <32 x i32> undef) 28 %v13 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v12, <32 x i32> zeroinitializer) 29 %v14 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v13, <32 x i32> undef) 30 %v15 = tail call <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32> %v14, <32 x i32> undef) 31 %v16 = add nsw i32 %v2, 8 32 %v17 = icmp eq i32 %v16, 64 33 br i1 %v17, label %b18, label %b1 34 35 b18: ; preds = %b7 36 tail call void @f0() #0 37 ret void 38 } 39 40 declare <32 x i32> @llvm.hexagon.V6.vaddhsat.128B(<32 x i32>, <32 x i32>) #1 41 declare void @f0() #0 42 43 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" } 44 attributes #1 = { nounwind readnone } 45
