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      1 ; RUN: llc -march=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s
      2 ;
      3 ; Expand-condsets eliminates the "mux" instruction, which is what this
      4 ; testcase is checking.
      5 
      6 %struct._Dnk_filet.1 = type { i16, i8, i32, i8*, i8*, i8*, i8*, i8*, i8*, i32*, [2 x i32], i8*, i8*, i8*, %struct._Mbstatet.0, i8*, [8 x i8], i8 }
      7 %struct._Mbstatet.0 = type { i32, i16, i16 }
      8 
      9 @_Stdout = external global %struct._Dnk_filet.1
     10 @.str = external unnamed_addr constant [23 x i8], align 8
     11 
     12 ; Test that we don't generate a new value compare if the operands are
     13 ; the same register.
     14 
     15 ; CHECK-NOT: cmp.eq([[REG0:(r[0-9]+)]].new,[[REG0]])
     16 ; CHECK: cmp.eq([[REG1:(r[0-9]+)]],[[REG1]])
     17 
     18 ; Function Attrs: nounwind
     19 declare void @fprintf(%struct._Dnk_filet.1* nocapture, i8* nocapture readonly, ...) #1
     20 
     21 define void @main() #0 {
     22 entry:
     23   %0 = load i32*, i32** undef, align 4
     24   %1 = load i32, i32* undef, align 4
     25   br i1 undef, label %if.end, label %_ZNSt6vectorIbSaIbEE3endEv.exit
     26 
     27 _ZNSt6vectorIbSaIbEE3endEv.exit:
     28   %2 = icmp slt i32 %1, 0
     29   %sub5.i.i.i = lshr i32 %1, 5
     30   %add619.i.i.i = add i32 %sub5.i.i.i, -134217728
     31   %sub5.i.pn.i.i = select i1 %2, i32 %add619.i.i.i, i32 %sub5.i.i.i
     32   %storemerge2.i.i = getelementptr inbounds i32, i32* %0, i32 %sub5.i.pn.i.i
     33   %cmp.i.i = icmp ult i32* %storemerge2.i.i, %0
     34   %.mux = select i1 %cmp.i.i, i32 0, i32 1
     35   br i1 undef, label %_ZNSt6vectorIbSaIbEE3endEv.exit57, label %if.end
     36 
     37 _ZNSt6vectorIbSaIbEE3endEv.exit57:
     38   %3 = icmp slt i32 %1, 0
     39   %sub5.i.i.i44 = lshr i32 %1, 5
     40   %add619.i.i.i45 = add i32 %sub5.i.i.i44, -134217728
     41   %sub5.i.pn.i.i46 = select i1 %3, i32 %add619.i.i.i45, i32 %sub5.i.i.i44
     42   %storemerge2.i.i47 = getelementptr inbounds i32, i32* %0, i32 %sub5.i.pn.i.i46
     43   %cmp.i38 = icmp ult i32* %storemerge2.i.i47, %0
     44   %.reg2mem.sroa.0.sroa.0.0.load14.i.reload = select i1 %cmp.i38, i32 0, i32 1
     45   %cmp = icmp eq i32 %.mux, %.reg2mem.sroa.0.sroa.0.0.load14.i.reload
     46   br i1 %cmp, label %if.end, label %if.then
     47 
     48 if.then:
     49   call void (%struct._Dnk_filet.1*, i8*, ...) @fprintf(%struct._Dnk_filet.1* @_Stdout, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i32 0, i32 0), i32 %.mux, i32 %.reg2mem.sroa.0.sroa.0.0.load14.i.reload) #1
     50   unreachable
     51 
     52 if.end:
     53   br i1 undef, label %_ZNSt6vectorIbSaIbEED2Ev.exit, label %if.then.i.i.i
     54 
     55 if.then.i.i.i:
     56   unreachable
     57 
     58 _ZNSt6vectorIbSaIbEED2Ev.exit:
     59   ret void
     60 }
     61 
     62 attributes #0 = { "target-cpu"="hexagonv5" }
     63 attributes #1 = { nounwind "target-cpu"="hexagonv5" }
     64