1 ; RUN: llc -march=hexagon < %s 2 ; REQUIRES: asserts 3 4 ; Check that the verifier doesn't fail due to incorrect 5 ; ordering of registers caused by PHI elimination. 6 7 ; Function Attrs: readnone 8 define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 { 9 b0: 10 br label %b1 11 12 b1: ; preds = %b1, %b0 13 %v0 = phi i32 [ %a1, %b0 ], [ %v2, %b1 ] 14 %v1 = phi i32 [ 0, %b0 ], [ %v4, %b1 ] 15 %v2 = phi i32 [ %a0, %b0 ], [ %v0, %b1 ] 16 %v3 = icmp slt i32 %v1, %a2 17 %v4 = add nsw i32 %v1, 1 18 br i1 %v3, label %b1, label %b2 19 20 b2: ; preds = %b1 21 %v5 = add nsw i32 %v2, %v0 22 ret i32 %v5 23 } 24 25 attributes #0 = { readnone } 26
