1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 3 @v0 = global <16 x i32> zeroinitializer, align 64 4 @v1 = global <16 x i32> zeroinitializer, align 64 5 6 ; CHECK-LABEL: danny: 7 ; CHECK-NOT: vcombine 8 9 define void @danny() #0 { 10 %t0 = load <16 x i32>, <16 x i32>* @v0, align 64 11 %t1 = load <16 x i32>, <16 x i32>* @v1, align 64 12 %t2 = call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %t0, <16 x i32> %t1) 13 %t3 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %t2) 14 %t4 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %t2) 15 store <16 x i32> %t3, <16 x i32>* @v0, align 64 16 store <16 x i32> %t4, <16 x i32>* @v1, align 64 17 ret void 18 } 19 20 @w0 = global <32 x i32> zeroinitializer, align 128 21 @w1 = global <32 x i32> zeroinitializer, align 128 22 23 ; CHECK-LABEL: sammy: 24 ; CHECK-NOT: vcombine 25 26 define void @sammy() #1 { 27 %t0 = load <32 x i32>, <32 x i32>* @w0, align 128 28 %t1 = load <32 x i32>, <32 x i32>* @w1, align 128 29 %t2 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> %t0, <32 x i32> %t1) 30 %t3 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %t2) 31 %t4 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %t2) 32 store <32 x i32> %t3, <32 x i32>* @w0, align 128 33 store <32 x i32> %t4, <32 x i32>* @w1, align 128 34 ret void 35 } 36 37 declare <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32>, <16 x i32>) #2 38 declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #2 39 declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #2 40 41 declare <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32>, <32 x i32>) #3 42 declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #3 43 declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #3 44 45 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 46 attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" } 47 attributes #2 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 48 attributes #3 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" } 49
