1 ; RUN: llc -march=hexagon -O2 < %s | FileCheck %s 2 ; This test checks if redundant conditional branches are removed. 3 4 ; CHECK: memub 5 ; CHECK: memub 6 ; CHECK: memub 7 ; CHECK-NOT: if{{.*}}jump .LBB 8 ; CHECK: cmp.eq 9 10 target triple = "hexagon-unknown--elf" 11 12 ; Function Attrs: nounwind 13 declare void @f0() #0 14 15 ; Function Attrs: nounwind 16 define void @f1(i8* nocapture readonly %a0, i32 %a1) #0 { 17 b0: 18 br i1 undef, label %b8, label %b1 19 20 b1: ; preds = %b0 21 tail call void @f0() #0 22 br i1 false, label %b8, label %b2 23 24 b2: ; preds = %b1 25 %v0 = getelementptr inbounds i8, i8* %a0, i32 undef 26 %v1 = sub i32 0, %a1 27 %v2 = icmp eq i32 undef, undef 28 br label %b3 29 30 b3: ; preds = %b6, %b2 31 %v3 = phi i8* [ undef, %b2 ], [ %v17, %b6 ] 32 %v4 = phi i8* [ %v0, %b2 ], [ null, %b6 ] 33 %v5 = phi i32 [ 1, %b2 ], [ 0, %b6 ] 34 br i1 %v2, label %b4, label %b5 35 36 b4: ; preds = %b3 37 %v6 = load i8, i8* %v3, align 1 38 br label %b6 39 40 b5: ; preds = %b3 41 %v7 = load i8, i8* %v4, align 1 42 %v8 = zext i8 %v7 to i32 43 %v9 = getelementptr inbounds i8, i8* %v4, i32 %v1 44 %v10 = load i8, i8* %v9, align 1 45 %v11 = zext i8 %v10 to i32 46 %v12 = sub nsw i32 %v8, %v11 47 br label %b6 48 49 b6: ; preds = %b5, %b4 50 %v13 = phi i8 [ 0, %b5 ], [ %v6, %b4 ] 51 %v14 = phi i32 [ %v12, %b5 ], [ 0, %b4 ] 52 %v15 = zext i8 %v13 to i32 53 %v16 = mul nsw i32 %v14, %v14 54 %v17 = getelementptr inbounds i8, i8* %v3, i32 1 55 %v18 = sub nsw i32 0, %v15 56 %v19 = mul nsw i32 %v18, %v18 57 %v20 = add nuw i32 %v16, 0 58 %v21 = add i32 %v20, 0 59 %v22 = add i32 %v21, 0 60 %v23 = lshr i32 %v22, 1 61 %v24 = add nuw nsw i32 %v23, %v19 62 %v25 = add nsw i32 %v24, 0 63 store i32 %v25, i32* null, align 4 64 %v26 = icmp eq i32 %v5, undef 65 br i1 %v26, label %b7, label %b3 66 67 b7: ; preds = %b6 68 unreachable 69 70 b8: ; preds = %b1, %b0 71 ret void 72 } 73 74 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 75
