1 ; RUN: llc -march=hexagon -enable-pipeliner < %s | FileCheck %s 2 3 ; Test that we generate the correct value for a Phi in the epilog 4 ; that is for a value defined two stages earlier. An extra copy in the 5 ; epilog means the schedule is incorrect. 6 7 ; CHECK: endloop0 8 ; CHECK-NOT: r{{[0-9]+}} = r{{[0-9]+}} 9 10 ; Function Attrs: nounwind 11 define void @f0(i32 %a0, i32* %a1, [1000 x i32]* %a2) #0 { 12 b0: 13 br i1 undef, label %b1, label %b3 14 15 b1: ; preds = %b1, %b0 16 %v0 = phi i32 [ %v8, %b1 ], [ 1, %b0 ] 17 %v1 = load i32, i32* null, align 4, !tbaa !0 18 %v2 = getelementptr inbounds i32, i32* %a1, i32 %v0 19 %v3 = load i32, i32* %v2, align 4, !tbaa !0 20 %v4 = load i32, i32* undef, align 4, !tbaa !0 21 %v5 = mul nsw i32 %v4, %v3 22 %v6 = add nsw i32 %v5, %v1 23 %v7 = getelementptr inbounds [1000 x i32], [1000 x i32]* %a2, i32 %v0, i32 0 24 store i32 %v6, i32* %v7, align 4, !tbaa !0 25 %v8 = add nsw i32 %v0, 1 26 %v9 = icmp eq i32 %v8, %a0 27 br i1 %v9, label %b2, label %b1 28 29 b2: ; preds = %b1 30 unreachable 31 32 b3: ; preds = %b0 33 ret void 34 } 35 36 attributes #0 = { nounwind "target-cpu"="hexagonv60" } 37 38 !0 = !{!1, !1, i64 0} 39 !1 = !{!"long", !2, i64 0} 40 !2 = !{!"omnipotent char", !3, i64 0} 41 !3 = !{!"Simple C/C++ TBAA"} 42
