1 ; RUN: llc -march=hexagon -enable-pipeliner -pipeliner-max-stages=2 \ 2 ; RUN: -pipeliner-ignore-recmii -disable-hexagon-nv-schedule -stats -o /dev/null\ 3 ; RUN: -enable-aa-sched-mi < %s 2>&1 | FileCheck %s --check-prefix=STATS 4 ; REQUIRES: asserts 5 ; 6 ; Test that we generate the correct phis in the last epilog block when 7 ; allowing multiple stages. 8 ; 9 ; STATS: 1 pipeliner - Number of loops software pipelined 10 11 ; Function Attrs: nounwind 12 define void @f0() #0 { 13 b0: 14 br i1 undef, label %b6, label %b1 15 16 b1: ; preds = %b0 17 br i1 undef, label %b6, label %b2 18 19 b2: ; preds = %b1 20 br label %b4 21 22 b3: ; preds = %b4, %b3 23 %v0 = add nsw i32 0, 57344 24 %v1 = trunc i32 %v0 to i16 25 store i16 %v1, i16* null, align 2, !tbaa !0 26 %v2 = getelementptr inbounds i8, i8* null, i32 undef 27 %v3 = load i8, i8* %v2, align 1, !tbaa !4 28 %v4 = zext i8 %v3 to i32 29 %v5 = shl nuw nsw i32 %v4, 6 30 %v6 = add nsw i32 %v5, 57344 31 %v7 = trunc i32 %v6 to i16 32 store i16 %v7, i16* undef, align 2, !tbaa !0 33 br i1 undef, label %b5, label %b3 34 35 b4: ; preds = %b5, %b2 36 %v8 = phi i32 [ 0, %b2 ], [ %v9, %b5 ] 37 br label %b3 38 39 b5: ; preds = %b3 40 %v9 = add i32 %v8, 1 41 %v10 = icmp eq i32 %v9, undef 42 br i1 %v10, label %b6, label %b4 43 44 b6: ; preds = %b5, %b1, %b0 45 ret void 46 } 47 48 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 49 50 !0 = !{!1, !1, i64 0} 51 !1 = !{!"short", !2} 52 !2 = !{!"omnipotent char", !3} 53 !3 = !{!"Simple C/C++ TBAA"} 54 !4 = !{!2, !2, i64 0} 55
