1 ; RUN: llc -fp-contract=fast -O3 -march=hexagon < %s 2 ; REQUIRES: asserts 3 4 ; Test that the pipeliner doesn't ICE due because the PHI generation 5 ; code in the epilog does not attempt to reuse an existing PHI. 6 ; Similar test case as swp-epilog-reuse.ll but with a couple of 7 ; differences. 8 9 ; Function Attrs: nounwind 10 define void @f0(float* noalias %a0, float* noalias %a1) #0 { 11 b0: 12 %v0 = getelementptr inbounds float, float* %a1, i32 2 13 br i1 undef, label %b1, label %b6 14 15 b1: ; preds = %b5, %b0 16 %v1 = phi float* [ undef, %b5 ], [ %v0, %b0 ] 17 %v2 = phi float* [ %v32, %b5 ], [ undef, %b0 ] 18 %v3 = getelementptr inbounds float, float* %a0, i32 undef 19 %v4 = getelementptr inbounds float, float* %v1, i32 1 20 br i1 undef, label %b2, label %b5 21 22 b2: ; preds = %b1 23 %v5 = getelementptr float, float* %v3, i32 1 24 br label %b3 25 26 b3: ; preds = %b3, %b2 27 %v6 = phi float* [ %v5, %b2 ], [ %v20, %b3 ] 28 %v7 = phi float [ %v19, %b3 ], [ undef, %b2 ] 29 %v8 = phi float [ %v7, %b3 ], [ undef, %b2 ] 30 %v9 = phi float* [ %v15, %b3 ], [ %v4, %b2 ] 31 %v10 = bitcast float* %v6 to i8* 32 %v11 = fadd float undef, 0.000000e+00 33 %v12 = fadd float undef, %v11 34 %v13 = fadd float %v7, %v12 35 %v14 = fmul float %v13, 3.906250e-03 36 %v15 = getelementptr inbounds float, float* %v9, i32 1 37 store float %v14, float* %v9, align 4, !tbaa !0 38 %v16 = getelementptr i8, i8* %v10, i32 undef 39 %v17 = bitcast i8* %v16 to float* 40 %v18 = load float, float* %v17, align 4, !tbaa !0 41 %v19 = fadd float %v18, undef 42 %v20 = getelementptr float, float* %v6, i32 2 43 %v21 = icmp ult float* %v15, %v2 44 br i1 %v21, label %b3, label %b4 45 46 b4: ; preds = %b3 47 %v22 = getelementptr float, float* %v4, i32 undef 48 br label %b5 49 50 b5: ; preds = %b4, %b1 51 %v23 = phi float* [ %v4, %b1 ], [ %v22, %b4 ] 52 %v24 = phi float [ undef, %b1 ], [ %v8, %b4 ] 53 %v25 = fadd float %v24, undef 54 %v26 = fadd float %v25, undef 55 %v27 = fadd float undef, %v26 56 %v28 = fadd float undef, %v27 57 %v29 = fpext float %v28 to double 58 %v30 = fmul double %v29, 0x3F7111112119E8FB 59 %v31 = fptrunc double %v30 to float 60 store float %v31, float* %v23, align 4, !tbaa !0 61 %v32 = getelementptr inbounds float, float* %v2, i32 undef 62 br i1 undef, label %b1, label %b6 63 64 b6: ; preds = %b5, %b0 65 ret void 66 } 67 68 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 69 70 !0 = !{!1, !1, i64 0} 71 !1 = !{!"omnipotent char", !2, i64 0} 72 !2 = !{!"Simple C/C++ TBAA"} 73