1 ; RUN: llc -march=hexagon -enable-pipeliner -stats -o /dev/null < %s 2>&1 | FileCheck %s --check-prefix=STATS 2 ; REQUIRES: asserts 3 4 ; STATS: 1 pipeliner - Number of loops software pipelined 5 6 ; Function Attrs: nounwind 7 define void @f0(i32 %a0) #0 { 8 b0: 9 %v0 = icmp slt i32 %a0, 123469 10 br i1 %v0, label %b1, label %b4 11 12 b1: ; preds = %b0 13 br label %b2 14 15 b2: ; preds = %b2, %b1 16 %v1 = phi i64 [ undef, %b1 ], [ %v12, %b2 ] 17 %v2 = phi i64 [ undef, %b1 ], [ %v10, %b2 ] 18 %v3 = phi i32 [ 0, %b1 ], [ %v13, %b2 ] 19 %v4 = phi i32 [ undef, %b1 ], [ %v9, %b2 ] 20 %v5 = phi i64 [ undef, %b1 ], [ %v7, %b2 ] 21 %v6 = phi i64 [ undef, %b1 ], [ %v11, %b2 ] 22 %v7 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v5, i64 %v6, i64 %v6) 23 %v8 = tail call i64 @llvm.hexagon.S2.packhl(i32 undef, i32 %v4) 24 %v9 = load i32, i32* undef, align 4, !tbaa !0 25 %v10 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v2, i64 %v6, i64 %v8) 26 %v11 = tail call i64 @llvm.hexagon.S2.packhl(i32 %v9, i32 undef) 27 %v12 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v1, i64 %v6, i64 %v11) 28 %v13 = add nsw i32 %v3, 1 29 %v14 = icmp eq i32 %v13, undef 30 br i1 %v14, label %b3, label %b2 31 32 b3: ; preds = %b2 33 %v15 = lshr i64 %v12, 32 34 br label %b4 35 36 b4: ; preds = %b3, %b0 37 %v16 = phi i64 [ %v10, %b3 ], [ undef, %b0 ] 38 %v17 = phi i64 [ %v7, %b3 ], [ undef, %b0 ] 39 unreachable 40 } 41 42 ; Function Attrs: nounwind readnone 43 declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1 44 45 ; Function Attrs: nounwind readnone 46 declare i64 @llvm.hexagon.S2.packhl(i32, i32) #1 47 48 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 49 attributes #1 = { nounwind readnone } 50 51 !0 = !{!1, !1, i64 0} 52 !1 = !{!"int", !2} 53 !2 = !{!"omnipotent char", !3} 54 !3 = !{!"Simple C/C++ TBAA"} 55
