1 ; RUN: llc -march=hexagon -O3 < %s 2 ; REQUIRES: asserts 3 4 ; Test that we generate the correct names for Phis when there is 5 ; a Phi that references a Phi that references another Phi. For example, 6 ; v6 = phi(v1, v9) 7 ; v7 = phi(v0, v6) 8 ; v8 = phi(v2, v7) 9 10 ; Function Attrs: nounwind 11 define void @f0(i8* noalias nocapture readonly %a0, i32 %a1, i32 %a2, i8* noalias nocapture %a3, i32 %a4) #0 { 12 b0: 13 %v0 = add i32 %a1, -1 14 %v1 = getelementptr inbounds i8, i8* %a0, i32 0 15 %v2 = getelementptr inbounds i8, i8* %a0, i32 undef 16 %v3 = getelementptr inbounds i8, i8* %a3, i32 0 17 br i1 undef, label %b1, label %b4 18 19 b1: ; preds = %b1, %b0 20 br i1 undef, label %b1, label %b2 21 22 b2: ; preds = %b1 23 %v4 = getelementptr inbounds i8, i8* %a0, i32 undef 24 br label %b3 25 26 b3: ; preds = %b3, %b2 27 %v5 = phi i8* [ %v10, %b3 ], [ %v3, %b2 ] 28 %v6 = phi i8* [ %v25, %b3 ], [ %v4, %b2 ] 29 %v7 = phi i8* [ %v6, %b3 ], [ %v2, %b2 ] 30 %v8 = phi i8* [ %v7, %b3 ], [ %v1, %b2 ] 31 %v9 = phi i32 [ %v26, %b3 ], [ 1, %b2 ] 32 %v10 = getelementptr inbounds i8, i8* %v5, i32 %a4 33 %v11 = getelementptr inbounds i8, i8* %v8, i32 -1 34 %v12 = load i8, i8* %v11, align 1, !tbaa !0 35 %v13 = zext i8 %v12 to i32 36 %v14 = add nuw nsw i32 %v13, 0 37 %v15 = add nuw nsw i32 %v14, 0 38 %v16 = add nuw nsw i32 %v15, 0 39 %v17 = load i8, i8* %v6, align 1, !tbaa !0 40 %v18 = zext i8 %v17 to i32 41 %v19 = add nuw nsw i32 %v16, %v18 42 %v20 = add nuw nsw i32 %v19, 0 43 %v21 = mul nsw i32 %v20, 7282 44 %v22 = add nsw i32 %v21, 32768 45 %v23 = lshr i32 %v22, 16 46 %v24 = trunc i32 %v23 to i8 47 store i8 %v24, i8* %v10, align 1, !tbaa !0 48 %v25 = getelementptr inbounds i8, i8* %v6, i32 %a2 49 %v26 = add i32 %v9, 1 50 %v27 = icmp eq i32 %v26, %v0 51 br i1 %v27, label %b4, label %b3 52 53 b4: ; preds = %b3, %b0 54 ret void 55 } 56 57 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 58 59 !0 = !{!1, !1, i64 0} 60 !1 = !{!"omnipotent char", !2, i64 0} 61 !2 = !{!"Simple C/C++ TBAA"} 62
