1 ; RUN: llc -march=hexagon < %s 2 ; REQUIRES: asserts 3 4 %s.0 = type { i64 } 5 6 ; Function Attrs: nounwind readnone 7 declare i64 @llvm.hexagon.A2.combinew(i32, i32) #0 8 9 define void @f0(%s.0* noalias nocapture %a0, i32 %a1) local_unnamed_addr { 10 b0: 11 %v0 = call i64 @llvm.hexagon.A2.combinew(i32 %a1, i32 %a1) 12 br label %b1 13 14 b1: ; preds = %b1, %b0 15 %v1 = phi i32 [ 0, %b0 ], [ %v6, %b1 ] 16 %v2 = mul nuw nsw i32 %v1, 13 17 %v3 = getelementptr inbounds %s.0, %s.0* %a0, i32 %v2, i32 0 18 %v4 = load i64, i64* %v3, align 8 19 %v5 = add nsw i64 %v4, %v0 20 store i64 %v5, i64* %v3, align 8 21 %v6 = add nuw nsw i32 %v1, 1 22 %v7 = icmp eq i32 %v6, 12 23 br i1 %v7, label %b2, label %b1 24 25 b2: ; preds = %b1 26 ret void 27 } 28 29 attributes #0 = { nounwind readnone } 30
