1 ; RUN: llc -march=hexagon -rdf-opt=0 < %s | FileCheck %s 2 3 ; Test that we generate the correct name for a value in a prolog block. The 4 ; pipeliner was using an incorrect value for an instruction in the 2nd prolog 5 ; block for a value defined by a Phi. The result was that an instruction in 6 ; the 1st and 2nd prolog blocks contain the same operands. 7 8 ; CHECK: vcmp.gt([[VREG:(v[0-9]+)]].uh,v{{[0-9]+}}.uh) 9 ; CHECK-NOT: vcmp.gt([[VREG]].uh,v{{[0-9]+}}.uh) 10 ; CHECK: loop0 11 12 define void @f0(<64 x i32> %a0, <32 x i32> %a1) #0 { 13 b0: 14 br i1 undef, label %b1, label %b5 15 16 b1: ; preds = %b0 17 %v0 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %a0) 18 br label %b2 19 20 b2: ; preds = %b4, %b1 21 %v1 = phi <32 x i32> [ %a1, %b1 ], [ %v7, %b4 ] 22 br label %b3 23 24 b3: ; preds = %b3, %b2 25 %v2 = phi i32 [ 0, %b2 ], [ %v8, %b3 ] 26 %v3 = phi <32 x i32> [ zeroinitializer, %b2 ], [ %v0, %b3 ] 27 %v4 = phi <32 x i32> [ %v1, %b2 ], [ %v7, %b3 ] 28 %v5 = tail call <1024 x i1> @llvm.hexagon.V6.vgtuh.128B(<32 x i32> %v3, <32 x i32> undef) 29 %v6 = tail call <1024 x i1> @llvm.hexagon.V6.veqh.and.128B(<1024 x i1> %v5, <32 x i32> undef, <32 x i32> undef) 30 %v7 = tail call <32 x i32> @llvm.hexagon.V6.vaddhq.128B(<1024 x i1> %v6, <32 x i32> %v4, <32 x i32> undef) 31 %v8 = add nsw i32 %v2, 1 32 %v9 = icmp slt i32 %v8, undef 33 br i1 %v9, label %b3, label %b4 34 35 b4: ; preds = %b3 36 br i1 undef, label %b5, label %b2 37 38 b5: ; preds = %b4, %b0 39 ret void 40 } 41 42 ; Function Attrs: nounwind readnone 43 declare <1024 x i1> @llvm.hexagon.V6.vgtuh.128B(<32 x i32>, <32 x i32>) #1 44 45 ; Function Attrs: nounwind readnone 46 declare <1024 x i1> @llvm.hexagon.V6.veqh.and.128B(<1024 x i1>, <32 x i32>, <32 x i32>) #1 47 48 ; Function Attrs: nounwind readnone 49 declare <32 x i32> @llvm.hexagon.V6.vaddhq.128B(<1024 x i1>, <32 x i32>, <32 x i32>) #1 50 51 ; Function Attrs: nounwind readnone 52 declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #1 53 54 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" } 55 attributes #1 = { nounwind readnone } 56
