1 ; RUN: llc -march=hexagon -fp-contract=fast -enable-pipeliner < %s 2 ; REQUIRES: asserts 3 4 ; Pipelining can eliminate the need for a Phi if the loop carried use 5 ; is scheduled first. We need to rename register uses of the Phi 6 ; that may occur after the loop. 7 8 define void @f0() #0 { 9 b0: 10 br i1 undef, label %b1, label %b12 11 12 b1: ; preds = %b0 13 %v0 = load float, float* undef, align 4 14 br i1 undef, label %b2, label %b5 15 16 b2: ; preds = %b1 17 br i1 undef, label %b3, label %b4 18 19 b3: ; preds = %b3, %b2 20 br label %b3 21 22 b4: ; preds = %b4, %b2 23 br i1 undef, label %b5, label %b4 24 25 b5: ; preds = %b4, %b1 26 br i1 undef, label %b6, label %b9 27 28 b6: ; preds = %b5 29 br i1 undef, label %b7, label %b8 30 31 b7: ; preds = %b7, %b6 32 br label %b7 33 34 b8: ; preds = %b8, %b6 35 %v1 = phi i32 [ %v7, %b8 ], [ 2, %b6 ] 36 %v2 = phi float [ %v6, %b8 ], [ undef, %b6 ] 37 %v3 = phi float [ %v2, %b8 ], [ undef, %b6 ] 38 %v4 = fmul float undef, %v2 39 %v5 = fsub float %v4, %v3 40 %v6 = fadd float %v5, undef 41 %v7 = add nsw i32 %v1, 1 42 %v8 = icmp eq i32 %v7, undef 43 br i1 %v8, label %b9, label %b8 44 45 b9: ; preds = %b8, %b5 46 %v9 = phi float [ undef, %b5 ], [ %v2, %b8 ] 47 %v10 = fsub float 0.000000e+00, %v9 48 %v11 = fadd float %v10, undef 49 %v12 = fmul float undef, %v11 50 %v13 = fcmp ugt float %v12, 0.000000e+00 51 br i1 %v13, label %b10, label %b11 52 53 b10: ; preds = %b9 54 br label %b11 55 56 b11: ; preds = %b10, %b9 57 %v14 = phi float [ undef, %b10 ], [ %v0, %b9 ] 58 %v15 = fadd float undef, %v14 59 br label %b13 60 61 b12: ; preds = %b0 62 ret void 63 64 b13: ; preds = %b13, %b11 65 br label %b13 66 } 67 68 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 69
