Home | History | Annotate | Download | only in Hexagon
      1 ; REQUIRES: to-be-fixed
      2 ; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s | FileCheck %s
      3 
      4 ; Multiply and accumulate
      5 ; CHECK: mpyi([[REG0:r([0-9]+)]],[[REG1:r([0-9]+)]])
      6 ; CHECK-NEXT: [[REG1]] = memw(r{{[0-9]+}}++#4)
      7 ; CHECK-NEXT: [[REG0]] = memw(r{{[0-9]+}}++#4)
      8 ; CHECK-NEXT: endloop0
      9 
     10 define i32 @f0(i32* %a0, i32* %a1, i32 %a2) {
     11 b0:
     12   br label %b1
     13 
     14 b1:                                               ; preds = %b1, %b0
     15   %v0 = phi i32 [ 0, %b0 ], [ %v7, %b1 ]
     16   %v1 = phi i32* [ %a0, %b0 ], [ %v10, %b1 ]
     17   %v2 = phi i32* [ %a1, %b0 ], [ %v11, %b1 ]
     18   %v3 = phi i32 [ 0, %b0 ], [ %v8, %b1 ]
     19   %v4 = load i32, i32* %v1, align 4
     20   %v5 = load i32, i32* %v2, align 4
     21   %v6 = mul nsw i32 %v5, %v4
     22   %v7 = add nsw i32 %v6, %v0
     23   %v8 = add nsw i32 %v3, 1
     24   %v9 = icmp eq i32 %v8, 10000
     25   %v10 = getelementptr i32, i32* %v1, i32 1
     26   %v11 = getelementptr i32, i32* %v2, i32 1
     27   br i1 %v9, label %b2, label %b1
     28 
     29 b2:                                               ; preds = %b1
     30   ret i32 %v7
     31 }
     32