1 ; RUN: llc -march=hexagon -O3 -verify-machineinstrs -disable-hexagon-peephole < %s 2 ; REQUIRES: asserts 3 4 ; This test checks if tied operands are consistent. 5 target triple = "hexagon-unknown--elf" 6 7 ; Function Attrs: nounwind 8 define void @f0(i16* nocapture %a0) #0 { 9 b0: 10 br label %b1 11 12 b1: ; preds = %b5, %b0 13 %v0 = phi i16* [ %a0, %b0 ], [ %v5, %b5 ] 14 %v1 = phi i16 [ undef, %b0 ], [ %v10, %b5 ] 15 br i1 undef, label %b2, label %b3 16 17 b2: ; preds = %b1 18 %v2 = getelementptr inbounds i16, i16* %v0, i32 1 19 %v3 = load i16, i16* %v0, align 2, !tbaa !0 20 br label %b3 21 22 b3: ; preds = %b2, %b1 23 %v4 = phi i16 [ %v3, %b2 ], [ %v1, %b1 ] 24 %v5 = phi i16* [ %v2, %b2 ], [ %v0, %b1 ] 25 %v6 = lshr i16 %v4, 4 26 %v7 = zext i16 %v6 to i32 27 %v8 = and i32 %v7, 15 28 %v9 = icmp ult i32 %v8, 9 29 br i1 %v9, label %b4, label %b5 30 31 b4: ; preds = %b3 32 call void @llvm.trap() 33 unreachable 34 35 b5: ; preds = %b3 36 %v10 = lshr i16 %v4, 8 37 br label %b1 38 } 39 40 ; Function Attrs: noreturn nounwind 41 declare void @llvm.trap() #1 42 43 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 44 attributes #1 = { noreturn nounwind } 45 46 !0 = !{!1, !1, i64 0} 47 !1 = !{!"short", !2} 48 !2 = !{!"omnipotent char", !3} 49 !3 = !{!"Simple C/C++ TBAA"} 50
