1 ; RUN: llc -march=hexagon < %s | FileCheck %s 2 3 ; Test that we generate multiple using upper result. 4 5 ; CHECK: = mpy(r{{[0-9]+}},r{{[0-9]+}}) 6 ; CHECK: = mpy(r{{[0-9]+}},r{{[0-9]+}}) 7 ; CHECK: = mpy(r{{[0-9]+}},r{{[0-9]+}}) 8 ; CHECK: = mpy(r{{[0-9]+}},r{{[0-9]+}}) 9 10 @g0 = external constant [1152 x i32], align 8 11 @g1 = external constant [2 x i32], align 8 12 13 ; Function Attrs: nounwind 14 define void @f0(i32* nocapture readonly %a0, i32* %a1, i32* nocapture %a2, i32 %a3, i32 %a4) #0 { 15 b0: 16 %v0 = getelementptr inbounds i32, i32* %a0, i32 512 17 %v1 = getelementptr inbounds i32, i32* %a0, i32 511 18 %v2 = getelementptr inbounds i32, i32* %a2, i32 1023 19 %v3 = getelementptr inbounds i32, i32* %a1, i32 1023 20 br label %b1 21 22 b1: ; preds = %b0 23 %v4 = load i32, i32* getelementptr inbounds ([2 x i32], [2 x i32]* @g1, i32 0, i32 1), align 4 24 %v5 = getelementptr inbounds [1152 x i32], [1152 x i32]* @g0, i32 0, i32 %v4 25 br label %b2 26 27 b2: ; preds = %b1 28 br label %b3 29 30 b3: ; preds = %b3, %b2 31 %v6 = phi i32* [ %v30, %b3 ], [ %a2, %b2 ] 32 %v7 = phi i32* [ %v44, %b3 ], [ %a1, %b2 ] 33 %v8 = phi i32* [ %v17, %b3 ], [ %v0, %b2 ] 34 %v9 = phi i32* [ %v34, %b3 ], [ %v1, %b2 ] 35 %v10 = phi i32* [ %v40, %b3 ], [ %v3, %b2 ] 36 %v11 = phi i32* [ %v33, %b3 ], [ %v2, %b2 ] 37 %v12 = phi i32* [ %v15, %b3 ], [ %v5, %b2 ] 38 %v13 = getelementptr inbounds i32, i32* %v12, i32 1 39 %v14 = load i32, i32* %v12, align 4 40 %v15 = getelementptr inbounds i32, i32* %v12, i32 2 41 %v16 = load i32, i32* %v13, align 4 42 %v17 = getelementptr inbounds i32, i32* %v8, i32 1 43 %v18 = load i32, i32* %v8, align 4 44 %v19 = sext i32 %v14 to i64 45 %v20 = sext i32 %v18 to i64 46 %v21 = mul nsw i64 %v20, %v19 47 %v22 = lshr i64 %v21, 32 48 %v23 = trunc i64 %v22 to i32 49 %v24 = sext i32 %v16 to i64 50 %v25 = mul nsw i64 %v20, %v24 51 %v26 = lshr i64 %v25, 32 52 %v27 = trunc i64 %v26 to i32 53 %v28 = load i32, i32* %v7, align 4 54 %v29 = sub nsw i32 %v28, %v23 55 %v30 = getelementptr inbounds i32, i32* %v6, i32 1 56 store i32 %v29, i32* %v6, align 4 57 %v31 = load i32, i32* %v10, align 4 58 %v32 = add nsw i32 %v27, %v31 59 %v33 = getelementptr inbounds i32, i32* %v11, i32 -1 60 store i32 %v32, i32* %v11, align 4 61 %v34 = getelementptr inbounds i32, i32* %v9, i32 -1 62 %v35 = load i32, i32* %v9, align 4 63 %v36 = sext i32 %v35 to i64 64 %v37 = mul nsw i64 %v36, %v19 65 %v38 = lshr i64 %v37, 32 66 %v39 = trunc i64 %v38 to i32 67 %v40 = getelementptr inbounds i32, i32* %v10, i32 -1 68 store i32 %v39, i32* %v10, align 4 69 %v41 = mul nsw i64 %v36, %v24 70 %v42 = lshr i64 %v41, 32 71 %v43 = trunc i64 %v42 to i32 72 %v44 = getelementptr inbounds i32, i32* %v7, i32 1 73 store i32 %v43, i32* %v7, align 4 74 %v45 = icmp ult i32* %v44, %v40 75 br i1 %v45, label %b3, label %b4 76 77 b4: ; preds = %b3 78 br label %b6 79 80 b5: ; No predecessors! 81 br label %b6 82 83 b6: ; preds = %b5, %b4 84 ret void 85 } 86 87 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 88
