1 ; RUN: llc -march=hexagon -O2 -disable-hexagon-shuffle=1 < %s | FileCheck %s 2 ; CHECK: vmemu(r{{[0-9]+}}) = v{{[0-9]*}} 3 4 target triple = "hexagon" 5 6 ; Function Attrs: nounwind 7 define void @f0(i8* %a0, i8* %a1) #0 { 8 b0: 9 %v0 = alloca i8*, align 4 10 %v1 = alloca i8*, align 4 11 %v2 = alloca <16 x i32>, align 64 12 %v3 = alloca <16 x i32>, align 64 13 %v4 = alloca <32 x i32>, align 128 14 store i8* %a0, i8** %v0, align 4 15 store i8* %a1, i8** %v1, align 4 16 %v5 = load i8*, i8** %v0, align 4 17 %v6 = load <16 x i32>, <16 x i32>* %v2, align 64 18 call void asm sideeffect " $1 = vmemu($0);\0A", "r,v"(i8* %v5, <16 x i32> %v6) #1, !srcloc !0 19 %v7 = load i8*, i8** %v0, align 4 20 %v8 = load <16 x i32>, <16 x i32>* %v3, align 64 21 call void asm sideeffect " $1 = vmemu($0);\0A", "r,v"(i8* %v7, <16 x i32> %v8) #1, !srcloc !1 22 %v9 = load <32 x i32>, <32 x i32>* %v4, align 128 23 %v10 = load <16 x i32>, <16 x i32>* %v2, align 64 24 %v11 = load <16 x i32>, <16 x i32>* %v3, align 64 25 call void asm sideeffect " $0 = vcombine($1,$2);\0A", "v,v,v"(<32 x i32> %v9, <16 x i32> %v10, <16 x i32> %v11) #1, !srcloc !2 26 %v12 = load i8*, i8** %v1, align 4 27 %v13 = load <16 x i32>, <16 x i32>* %v2, align 64 28 call void asm sideeffect " vmemu($0) = $1;\0A", "r,v,~{memory}"(i8* %v12, <16 x i32> %v13) #1, !srcloc !3 29 ret void 30 } 31 32 ; Function Attrs: nounwind 33 define i32 @f1() #0 { 34 b0: 35 ret i32 0 36 } 37 38 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 39 attributes #1 = { nounwind } 40 41 !0 = !{i32 272} 42 !1 = !{i32 348} 43 !2 = !{i32 424} 44 !3 = !{i32 519} 45
