1 ; RUN: llc -march=hexagon -O0 < %s | FileCheck %s 2 ; CHECK: allocframe(r29,#{{[1-9][0-9]*}}):raw 3 ; CHECK: r29 = and(r29,#-64) 4 5 target triple = "hexagon" 6 7 ; Function Attrs: nounwind 8 define i32 @f0() #0 { 9 b0: 10 %v0 = alloca <16 x i32>, align 64 11 %v1 = bitcast <16 x i32>* %v0 to i8* 12 call void @llvm.lifetime.start.p0i8(i64 64, i8* %v1) #3 13 %v2 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 1) 14 %v3 = tail call <16 x i32> @llvm.hexagon.V6.vsubh.rt(<16 x i32> %v2, i32 -1) 15 store <16 x i32> %v3, <16 x i32>* %v0, align 64, !tbaa !0 16 call void @f1(i32 64, i8* %v1) #3 17 call void @llvm.lifetime.end.p0i8(i64 64, i8* %v1) #3 18 ret i32 0 19 } 20 21 ; Function Attrs: nounwind readnone 22 declare <16 x i32> @llvm.hexagon.V6.vsubh.rt(<16 x i32>, i32) #1 23 24 ; Function Attrs: nounwind readnone 25 declare <16 x i32> @llvm.hexagon.V6.lvsplatw(i32) #1 26 27 declare void @f1(i32, i8*) #0 28 29 ; Function Attrs: argmemonly nounwind 30 declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #2 31 32 ; Function Attrs: argmemonly nounwind 33 declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #2 34 35 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 36 attributes #1 = { nounwind readnone } 37 attributes #2 = { argmemonly nounwind } 38 attributes #3 = { nounwind } 39 40 !0 = !{!1, !1, i64 0} 41 !1 = !{!"omnipotent char", !2, i64 0} 42 !2 = !{!"Simple C/C++ TBAA"} 43
