1 ; RUN: llc -march=hexagon -O0 < %s | FileCheck %s 2 3 ; We do not want to see a 'cannot select' error, 4 ; we would like to see a vasrh instruction 5 ; CHECK: vasrh 6 7 target triple = "hexagon" 8 9 @g0 = global [6 x i64] [i64 0, i64 1, i64 10000, i64 -9223372036854775808, i64 9223372036854775807, i64 -1], align 8 10 @g1 = common global i32 0, align 4 11 12 ; Function Attrs: nounwind 13 define i32 @f0() #0 { 14 b0: 15 %v0 = load i64, i64* getelementptr inbounds ([6 x i64], [6 x i64]* @g0, i32 0, i32 0), align 8, !tbaa !0 16 %v1 = tail call i64 @llvm.hexagon.S2.asr.i.vh(i64 %v0, i32 62) 17 %v2 = trunc i64 %v1 to i32 18 store i32 %v2, i32* @g1, align 4, !tbaa !4 19 ret i32 0 20 } 21 22 ; Function Attrs: nounwind readnone 23 declare i64 @llvm.hexagon.S2.asr.i.vh(i64, i32) #1 24 25 attributes #0 = { nounwind "target-cpu"="hexagonv55" } 26 attributes #1 = { nounwind readnone } 27 28 !0 = !{!1, !1, i64 0} 29 !1 = !{!"long long", !2, i64 0} 30 !2 = !{!"omnipotent char", !3, i64 0} 31 !3 = !{!"Simple C/C++ TBAA"} 32 !4 = !{!5, !5, i64 0} 33 !5 = !{!"int", !2, i64 0} 34
