1 ; RUN: llc -O2 -march=hexagon < %s | FileCheck %s 2 3 ; Hexagon's vsplatb/vsplath only consider the lower 8/16 bits of the source 4 ; register. Any extension of the source is not necessary. 5 6 ; CHECK-NOT: zxtb 7 ; CHECK-NOT: zxth 8 9 target triple = "hexagon" 10 11 ; Function Attrs: nounwind readnone 12 define i64 @f0(i64 %a0) #0 { 13 b0: 14 %v0 = trunc i64 %a0 to i32 15 %v1 = and i32 %v0, 65535 16 %v2 = tail call i64 @llvm.hexagon.S2.vsplatrh(i32 %v1) 17 %v3 = and i32 %v0, 255 18 %v4 = tail call i32 @llvm.hexagon.S2.vsplatrb(i32 %v3) 19 %v5 = sext i32 %v4 to i64 20 %v6 = add nsw i64 %v5, %v2 21 ret i64 %v6 22 } 23 24 ; Function Attrs: nounwind readnone 25 declare i64 @llvm.hexagon.S2.vsplatrh(i32) #0 26 27 ; Function Attrs: nounwind readnone 28 declare i32 @llvm.hexagon.S2.vsplatrb(i32) #0 29 30 attributes #0 = { nounwind readnone } 31
