1 ; RUN: llc < %s -march=mips -relocation-model=static | \ 2 ; RUN: FileCheck %s -check-prefix=STATIC-O32 3 ; RUN: llc < %s -march=mips -relocation-model=pic | \ 4 ; RUN: FileCheck %s -check-prefix=PIC-O32 5 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips4 | \ 6 ; RUN: FileCheck %s -check-prefix=PIC-N64 7 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips4 | \ 8 ; RUN: FileCheck %s -check-prefix=STATIC-N64 9 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 | \ 10 ; RUN: FileCheck %s -check-prefix=PIC-N64 11 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips64 | \ 12 ; RUN: FileCheck %s -check-prefix=STATIC-N64 13 14 define i32 @main() nounwind readnone { 15 entry: 16 %x = alloca i32, align 4 ; <i32*> [#uses=2] 17 store volatile i32 2, i32* %x, align 4 18 %0 = load volatile i32, i32* %x, align 4 ; <i32> [#uses=1] 19 ; STATIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2 20 ; STATIC-O32: lui $[[R1:[0-9]+]], %hi($JTI0_0) 21 ; STATIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]] 22 ; STATIC-O32: lw $[[R3:[0-9]+]], %lo($JTI0_0)($[[R2]]) 23 24 ; PIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2 25 ; PIC-O32: lw $[[R1:[0-9]+]], %got($JTI0_0) 26 ; PIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]] 27 ; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]]) 28 ; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]] 29 ; PIC-O32: jr $[[R5]] 30 31 ; STATIC-N64: dsrl $[[I32:[0-9]]], ${{[0-9]+}}, 32 32 ; STATIC-N64: dsll $[[R0:[0-9]]], $[[I32]], 3 33 ; STATIC-N64: lui $[[R1:[0-9]]], %highest(.LJTI0_0) 34 ; STATIC-N64: daddiu $[[R2:[0-9]]], $[[R1]], %higher(.LJTI0_0) 35 ; STATIC-N64: dsll $[[R3:[0-9]]], $[[R2]], 16 36 ; STATIC-N64: daddiu $[[R4:[0-9]]], $[[R3]], %hi(.LJTI0_0) 37 ; STATIC-N64: dsll $[[R5:[0-9]]], $[[R4]], 16 38 ; STATIC-N64: daddu $[[R6:[0-9]]], $[[R0]], $[[R4]] 39 ; STATIC-N64: ld ${{[0-9]+}}, %lo(.LJTI0_0)($[[R6]]) 40 41 ; PIC-N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 32 42 ; PIC-N64: ld $[[R1:[0-9]+]], %got_page(.LJTI0_0) 43 ; PIC-N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]] 44 ; PIC-N64: ld $[[R4:[0-9]+]], %got_ofst(.LJTI0_0)($[[R2]]) 45 ; PIC-N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]] 46 ; PIC-N64: jr $[[R5]] 47 switch i32 %0, label %bb4 [ 48 i32 0, label %bb5 49 i32 1, label %bb1 50 i32 2, label %bb2 51 i32 3, label %bb3 52 ] 53 54 bb1: ; preds = %entry 55 ret i32 2 56 57 bb2: ; preds = %entry 58 ret i32 0 59 60 bb3: ; preds = %entry 61 ret i32 3 62 63 bb4: ; preds = %entry 64 ret i32 4 65 66 bb5: ; preds = %entry 67 ret i32 1 68 } 69 70 ; STATIC-O32: .p2align 2 71 ; STATIC-O32: $JTI0_0: 72 ; STATIC-O32: .4byte 73 ; STATIC-O32: .4byte 74 ; STATIC-O32: .4byte 75 ; STATIC-O32: .4byte 76 ; PIC-O32: .p2align 2 77 ; PIC-O32: $JTI0_0: 78 ; PIC-O32: .gpword 79 ; PIC-O32: .gpword 80 ; PIC-O32: .gpword 81 ; PIC-O32: .gpword 82 ; STATIC-N64: .p2align 3 83 ; STATIC-N64: LJTI0_0: 84 ; STATIC-N64: .8byte 85 ; STATIC-N64: .8byte 86 ; STATIC-N64: .8byte 87 ; STATIC-N64: .8byte 88 ;; PIC-N64: .p2align 3 89 ; PIC-N64: .LJTI0_0: 90 ; PIC-N64: .gpdword 91 ; PIC-N64: .gpdword 92 ; PIC-N64: .gpdword 93 ; PIC-N64: .gpdword 94 95
