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      1 # RUN: llc -march=mipsel -mcpu=mips32r6 -start-after=block-placement %s -o - | FileCheck %s
      2 
      3 # Check that empty blocks in the cfg don't cause the mips hazard scheduler to
      4 # crash and that the nop is inserted correctly.
      5 
      6 # CHECK:  blezc
      7 # CHECK:  nop
      8 # CHECK: # %bb.1:
      9 # CHECK:  .insn
     10 # CHECK: # %bb.2:
     11 # CHECK:  .insn
     12 # CHECK: # %bb.3:
     13 # CHECK:  jal
     14 
     15 --- |
     16   ; ModuleID = '<stdin>'
     17   source_filename = "<stdin>"
     18   target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
     19 
     20   declare i32 @k()
     21 
     22   declare void @f(i32)
     23 
     24   define void @l5() {
     25   entry:
     26     %call = tail call i32 @k()
     27     %cmp = icmp sgt i32 %call, 0
     28     br i1 %cmp, label %if.then, label %if.end
     29 
     30   if.then:                                          ; preds = %entry
     31     tail call void @f(i32 signext 2)
     32     br label %if.end
     33 
     34   if.end:                                           ; preds = %if.then, %entry
     35     ret void
     36   }
     37 
     38 ---
     39 name:            l5
     40 alignment:       2
     41 exposesReturnsTwice: false
     42 legalized:       false
     43 regBankSelected: false
     44 selected:        false
     45 tracksRegLiveness: true
     46 frameInfo:
     47   isFrameAddressTaken: false
     48   isReturnAddressTaken: false
     49   hasStackMap:     false
     50   hasPatchPoint:   false
     51   stackSize:       24
     52   offsetAdjustment: 0
     53   maxAlignment:    4
     54   adjustsStack:    true
     55   hasCalls:        true
     56   maxCallFrameSize: 16
     57   hasOpaqueSPAdjustment: false
     58   hasVAStart:      false
     59   hasMustTailInVarArgFunc: false
     60 stack:
     61   - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$ra' }
     62 body:             |
     63   bb.0.entry:
     64     successors: %bb.1.if.then(0x50000000), %bb.4.if.end(0x30000000)
     65     liveins: $ra
     66 
     67     $sp = ADDiu $sp, -24
     68     CFI_INSTRUCTION def_cfa_offset 24
     69     SW killed $ra, $sp, 20 :: (store 4 into %stack.0)
     70     CFI_INSTRUCTION offset $ra_64, -4
     71     JAL @k, csr_o32_fp64, implicit-def dead $ra, implicit-def $sp, implicit-def $v0
     72     BLEZ $v0, %bb.4.if.end, implicit-def $at
     73 
     74   bb.1.if.then:
     75     successors: %bb.2.if.then(0x80000000)
     76 
     77   bb.2.if.then:
     78     successors: %bb.3.if.then(0x80000000)
     79 
     80   bb.3.if.then:
     81     successors: %bb.4.if.end(0x80000000)
     82 
     83     $a0 = ADDiu $zero, 2
     84     JAL @f, csr_o32_fp64, implicit-def dead $ra, implicit killed $a0, implicit-def $sp
     85 
     86   bb.4.if.end:
     87     $ra = LW $sp, 20 :: (load 4 from %stack.0)
     88     $sp = ADDiu $sp, 24
     89     PseudoReturn undef $ra
     90 
     91 ...
     92