1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=mipsel-mti-linux-gnu < %s | FileCheck %s -check-prefix=MIPS32 3 ; RUN: llc -mtriple=mips64el-mti-linux-gnu < %s | FileCheck %s -check-prefix=MIPS64 4 5 6 define i32 @mul5_32(i32 signext %a) { 7 ; MIPS32-LABEL: mul5_32: 8 ; MIPS32: # %bb.0: # %entry 9 ; MIPS32-NEXT: sll $1, $4, 2 10 ; MIPS32-NEXT: jr $ra 11 ; MIPS32-NEXT: addu $2, $1, $4 12 ; 13 ; MIPS64-LABEL: mul5_32: 14 ; MIPS64: # %bb.0: # %entry 15 ; MIPS64-NEXT: sll $1, $4, 2 16 ; MIPS64-NEXT: jr $ra 17 ; MIPS64-NEXT: addu $2, $1, $4 18 entry: 19 %mul = mul nsw i32 %a, 5 20 ret i32 %mul 21 } 22 23 define i32 @mul27_32(i32 signext %a) { 24 ; MIPS32-LABEL: mul27_32: 25 ; MIPS32: # %bb.0: # %entry 26 ; MIPS32-NEXT: sll $1, $4, 2 27 ; MIPS32-NEXT: addu $1, $1, $4 28 ; MIPS32-NEXT: sll $2, $4, 5 29 ; MIPS32-NEXT: jr $ra 30 ; MIPS32-NEXT: subu $2, $2, $1 31 ; 32 ; MIPS64-LABEL: mul27_32: 33 ; MIPS64: # %bb.0: # %entry 34 ; MIPS64-NEXT: sll $1, $4, 2 35 ; MIPS64-NEXT: addu $1, $1, $4 36 ; MIPS64-NEXT: sll $2, $4, 5 37 ; MIPS64-NEXT: jr $ra 38 ; MIPS64-NEXT: subu $2, $2, $1 39 entry: 40 %mul = mul nsw i32 %a, 27 41 ret i32 %mul 42 } 43 44 define i32 @muln2147483643_32(i32 signext %a) { 45 ; MIPS32-LABEL: muln2147483643_32: 46 ; MIPS32: # %bb.0: # %entry 47 ; MIPS32-NEXT: sll $1, $4, 2 48 ; MIPS32-NEXT: addu $1, $1, $4 49 ; MIPS32-NEXT: sll $2, $4, 31 50 ; MIPS32-NEXT: jr $ra 51 ; MIPS32-NEXT: addu $2, $2, $1 52 ; 53 ; MIPS64-LABEL: muln2147483643_32: 54 ; MIPS64: # %bb.0: # %entry 55 ; MIPS64-NEXT: sll $1, $4, 2 56 ; MIPS64-NEXT: addu $1, $1, $4 57 ; MIPS64-NEXT: sll $2, $4, 31 58 ; MIPS64-NEXT: jr $ra 59 ; MIPS64-NEXT: addu $2, $2, $1 60 entry: 61 %mul = mul nsw i32 %a, -2147483643 62 ret i32 %mul 63 } 64 65 define i64 @muln9223372036854775805_64(i64 signext %a) { 66 ; MIPS32-LABEL: muln9223372036854775805_64: 67 ; MIPS32: # %bb.0: # %entry 68 ; MIPS32-NEXT: sll $1, $4, 1 69 ; MIPS32-NEXT: addu $2, $1, $4 70 ; MIPS32-NEXT: sltu $1, $2, $1 71 ; MIPS32-NEXT: srl $3, $4, 31 72 ; MIPS32-NEXT: sll $6, $5, 1 73 ; MIPS32-NEXT: or $3, $6, $3 74 ; MIPS32-NEXT: addu $3, $3, $5 75 ; MIPS32-NEXT: addu $1, $3, $1 76 ; MIPS32-NEXT: sll $3, $4, 31 77 ; MIPS32-NEXT: jr $ra 78 ; MIPS32-NEXT: addu $3, $3, $1 79 ; 80 ; MIPS64-LABEL: muln9223372036854775805_64: 81 ; MIPS64: # %bb.0: # %entry 82 ; MIPS64-NEXT: dsll $1, $4, 1 83 ; MIPS64-NEXT: daddu $1, $1, $4 84 ; MIPS64-NEXT: dsll $2, $4, 63 85 ; MIPS64-NEXT: jr $ra 86 ; MIPS64-NEXT: daddu $2, $2, $1 87 entry: 88 %mul = mul nsw i64 %a, -9223372036854775805 89 ret i64 %mul 90 } 91 92 define i128 @muln170141183460469231731687303715884105725_128(i128 signext %a) { 93 ; MIPS32-LABEL: muln170141183460469231731687303715884105725_128: 94 ; MIPS32: # %bb.0: # %entry 95 ; MIPS32-NEXT: sll $1, $4, 1 96 ; MIPS32-NEXT: addu $2, $1, $4 97 ; MIPS32-NEXT: sltu $1, $2, $1 98 ; MIPS32-NEXT: srl $3, $4, 31 99 ; MIPS32-NEXT: sll $8, $5, 1 100 ; MIPS32-NEXT: or $8, $8, $3 101 ; MIPS32-NEXT: addu $3, $8, $5 102 ; MIPS32-NEXT: addu $3, $3, $1 103 ; MIPS32-NEXT: sltu $9, $3, $8 104 ; MIPS32-NEXT: xor $8, $3, $8 105 ; MIPS32-NEXT: movz $9, $1, $8 106 ; MIPS32-NEXT: srl $1, $5, 31 107 ; MIPS32-NEXT: sll $5, $6, 1 108 ; MIPS32-NEXT: or $5, $5, $1 109 ; MIPS32-NEXT: addu $8, $5, $6 110 ; MIPS32-NEXT: addu $1, $8, $9 111 ; MIPS32-NEXT: sltu $5, $8, $5 112 ; MIPS32-NEXT: srl $6, $6, 31 113 ; MIPS32-NEXT: sll $9, $7, 1 114 ; MIPS32-NEXT: or $6, $9, $6 115 ; MIPS32-NEXT: addu $6, $6, $7 116 ; MIPS32-NEXT: addu $5, $6, $5 117 ; MIPS32-NEXT: sll $4, $4, 31 118 ; MIPS32-NEXT: sltu $6, $1, $8 119 ; MIPS32-NEXT: addu $5, $5, $6 120 ; MIPS32-NEXT: addu $5, $4, $5 121 ; MIPS32-NEXT: jr $ra 122 ; MIPS32-NEXT: move $4, $1 123 ; 124 ; MIPS64-LABEL: muln170141183460469231731687303715884105725_128: 125 ; MIPS64: # %bb.0: # %entry 126 ; MIPS64-NEXT: dsrl $1, $4, 63 127 ; MIPS64-NEXT: dsll $2, $5, 1 128 ; MIPS64-NEXT: or $1, $2, $1 129 ; MIPS64-NEXT: daddu $1, $1, $5 130 ; MIPS64-NEXT: dsll $3, $4, 1 131 ; MIPS64-NEXT: daddu $2, $3, $4 132 ; MIPS64-NEXT: sltu $3, $2, $3 133 ; MIPS64-NEXT: dsll $3, $3, 32 134 ; MIPS64-NEXT: dsrl $3, $3, 32 135 ; MIPS64-NEXT: daddu $1, $1, $3 136 ; MIPS64-NEXT: dsll $3, $4, 63 137 ; MIPS64-NEXT: jr $ra 138 ; MIPS64-NEXT: daddu $3, $3, $1 139 entry: 140 %mul = mul nsw i128 %a, -170141183460469231731687303715884105725 141 ret i128 %mul 142 } 143 144 define i128 @mul170141183460469231731687303715884105723_128(i128 signext %a) { 145 ; MIPS32-LABEL: mul170141183460469231731687303715884105723_128: 146 ; MIPS32: # %bb.0: # %entry 147 ; MIPS32-NEXT: sll $1, $4, 2 148 ; MIPS32-NEXT: addu $2, $1, $4 149 ; MIPS32-NEXT: sltu $1, $2, $1 150 ; MIPS32-NEXT: srl $3, $4, 30 151 ; MIPS32-NEXT: sll $8, $5, 2 152 ; MIPS32-NEXT: or $3, $8, $3 153 ; MIPS32-NEXT: addu $8, $3, $5 154 ; MIPS32-NEXT: addu $8, $8, $1 155 ; MIPS32-NEXT: sltu $9, $8, $3 156 ; MIPS32-NEXT: xor $3, $8, $3 157 ; MIPS32-NEXT: sltu $10, $zero, $8 158 ; MIPS32-NEXT: sltu $11, $zero, $2 159 ; MIPS32-NEXT: movz $10, $11, $8 160 ; MIPS32-NEXT: movz $9, $1, $3 161 ; MIPS32-NEXT: srl $1, $5, 30 162 ; MIPS32-NEXT: sll $3, $6, 2 163 ; MIPS32-NEXT: or $1, $3, $1 164 ; MIPS32-NEXT: addu $3, $1, $6 165 ; MIPS32-NEXT: addu $5, $3, $9 166 ; MIPS32-NEXT: sll $4, $4, 31 167 ; MIPS32-NEXT: negu $9, $5 168 ; MIPS32-NEXT: sltu $12, $9, $10 169 ; MIPS32-NEXT: sltu $13, $5, $3 170 ; MIPS32-NEXT: sltu $1, $3, $1 171 ; MIPS32-NEXT: srl $3, $6, 30 172 ; MIPS32-NEXT: sll $6, $7, 2 173 ; MIPS32-NEXT: or $3, $6, $3 174 ; MIPS32-NEXT: addu $3, $3, $7 175 ; MIPS32-NEXT: addu $1, $3, $1 176 ; MIPS32-NEXT: addu $1, $1, $13 177 ; MIPS32-NEXT: subu $1, $4, $1 178 ; MIPS32-NEXT: sltu $3, $zero, $5 179 ; MIPS32-NEXT: subu $1, $1, $3 180 ; MIPS32-NEXT: subu $5, $1, $12 181 ; MIPS32-NEXT: subu $4, $9, $10 182 ; MIPS32-NEXT: negu $1, $8 183 ; MIPS32-NEXT: subu $3, $1, $11 184 ; MIPS32-NEXT: jr $ra 185 ; MIPS32-NEXT: negu $2, $2 186 ; 187 ; MIPS64-LABEL: mul170141183460469231731687303715884105723_128: 188 ; MIPS64: # %bb.0: # %entry 189 ; MIPS64-NEXT: dsrl $1, $4, 62 190 ; MIPS64-NEXT: dsll $2, $5, 2 191 ; MIPS64-NEXT: or $1, $2, $1 192 ; MIPS64-NEXT: daddu $1, $1, $5 193 ; MIPS64-NEXT: dsll $2, $4, 2 194 ; MIPS64-NEXT: daddu $5, $2, $4 195 ; MIPS64-NEXT: sltu $2, $5, $2 196 ; MIPS64-NEXT: dsll $2, $2, 32 197 ; MIPS64-NEXT: dsrl $2, $2, 32 198 ; MIPS64-NEXT: daddu $1, $1, $2 199 ; MIPS64-NEXT: dsll $2, $4, 63 200 ; MIPS64-NEXT: dsubu $1, $2, $1 201 ; MIPS64-NEXT: sltu $2, $zero, $5 202 ; MIPS64-NEXT: dsll $2, $2, 32 203 ; MIPS64-NEXT: dsrl $2, $2, 32 204 ; MIPS64-NEXT: dsubu $3, $1, $2 205 ; MIPS64-NEXT: jr $ra 206 ; MIPS64-NEXT: dnegu $2, $5 207 entry: 208 %mul = mul nsw i128 %a, 170141183460469231731687303715884105723 209 ret i128 %mul 210 } 211 212 define i32 @mul42949673_32(i32 %a) { 213 ; MIPS32-LABEL: mul42949673_32: 214 ; MIPS32: # %bb.0: 215 ; MIPS32-NEXT: sll $1, $4, 3 216 ; MIPS32-NEXT: addu $1, $1, $4 217 ; MIPS32-NEXT: sll $2, $4, 5 218 ; MIPS32-NEXT: addu $1, $2, $1 219 ; MIPS32-NEXT: sll $2, $4, 10 220 ; MIPS32-NEXT: subu $1, $2, $1 221 ; MIPS32-NEXT: sll $2, $4, 13 222 ; MIPS32-NEXT: addu $1, $2, $1 223 ; MIPS32-NEXT: sll $2, $4, 15 224 ; MIPS32-NEXT: addu $1, $2, $1 225 ; MIPS32-NEXT: sll $2, $4, 20 226 ; MIPS32-NEXT: subu $1, $2, $1 227 ; MIPS32-NEXT: sll $2, $4, 25 228 ; MIPS32-NEXT: sll $3, $4, 23 229 ; MIPS32-NEXT: addu $1, $3, $1 230 ; MIPS32-NEXT: jr $ra 231 ; MIPS32-NEXT: addu $2, $2, $1 232 ; 233 ; MIPS64-LABEL: mul42949673_32: 234 ; MIPS64: # %bb.0: 235 ; MIPS64-NEXT: sll $1, $4, 0 236 ; MIPS64-NEXT: sll $2, $1, 3 237 ; MIPS64-NEXT: addu $2, $2, $1 238 ; MIPS64-NEXT: sll $3, $1, 5 239 ; MIPS64-NEXT: addu $2, $3, $2 240 ; MIPS64-NEXT: sll $3, $1, 10 241 ; MIPS64-NEXT: subu $2, $3, $2 242 ; MIPS64-NEXT: sll $3, $1, 13 243 ; MIPS64-NEXT: addu $2, $3, $2 244 ; MIPS64-NEXT: sll $3, $1, 15 245 ; MIPS64-NEXT: addu $2, $3, $2 246 ; MIPS64-NEXT: sll $3, $1, 20 247 ; MIPS64-NEXT: subu $2, $3, $2 248 ; MIPS64-NEXT: sll $3, $1, 25 249 ; MIPS64-NEXT: sll $1, $1, 23 250 ; MIPS64-NEXT: addu $1, $1, $2 251 ; MIPS64-NEXT: jr $ra 252 ; MIPS64-NEXT: addu $2, $3, $1 253 %b = mul i32 %a, 42949673 254 ret i32 %b 255 } 256 257 define i64 @mul42949673_64(i64 %a) { 258 ; MIPS32-LABEL: mul42949673_64: 259 ; MIPS32: # %bb.0: # %entry 260 ; MIPS32-NEXT: lui $1, 655 261 ; MIPS32-NEXT: ori $1, $1, 23593 262 ; MIPS32-NEXT: multu $4, $1 263 ; MIPS32-NEXT: mflo $2 264 ; MIPS32-NEXT: mfhi $1 265 ; MIPS32-NEXT: sll $3, $5, 3 266 ; MIPS32-NEXT: addu $3, $3, $5 267 ; MIPS32-NEXT: sll $4, $5, 5 268 ; MIPS32-NEXT: addu $3, $4, $3 269 ; MIPS32-NEXT: sll $4, $5, 10 270 ; MIPS32-NEXT: subu $3, $4, $3 271 ; MIPS32-NEXT: sll $4, $5, 13 272 ; MIPS32-NEXT: addu $3, $4, $3 273 ; MIPS32-NEXT: sll $4, $5, 15 274 ; MIPS32-NEXT: addu $3, $4, $3 275 ; MIPS32-NEXT: sll $4, $5, 20 276 ; MIPS32-NEXT: subu $3, $4, $3 277 ; MIPS32-NEXT: sll $4, $5, 25 278 ; MIPS32-NEXT: sll $5, $5, 23 279 ; MIPS32-NEXT: addu $3, $5, $3 280 ; MIPS32-NEXT: addu $3, $4, $3 281 ; MIPS32-NEXT: jr $ra 282 ; MIPS32-NEXT: addu $3, $1, $3 283 ; 284 ; MIPS64-LABEL: mul42949673_64: 285 ; MIPS64: # %bb.0: # %entry 286 ; MIPS64-NEXT: dsll $1, $4, 3 287 ; MIPS64-NEXT: daddu $1, $1, $4 288 ; MIPS64-NEXT: dsll $2, $4, 5 289 ; MIPS64-NEXT: daddu $1, $2, $1 290 ; MIPS64-NEXT: dsll $2, $4, 10 291 ; MIPS64-NEXT: dsubu $1, $2, $1 292 ; MIPS64-NEXT: dsll $2, $4, 13 293 ; MIPS64-NEXT: daddu $1, $2, $1 294 ; MIPS64-NEXT: dsll $2, $4, 15 295 ; MIPS64-NEXT: daddu $1, $2, $1 296 ; MIPS64-NEXT: dsll $2, $4, 20 297 ; MIPS64-NEXT: dsubu $1, $2, $1 298 ; MIPS64-NEXT: dsll $2, $4, 25 299 ; MIPS64-NEXT: dsll $3, $4, 23 300 ; MIPS64-NEXT: daddu $1, $3, $1 301 ; MIPS64-NEXT: jr $ra 302 ; MIPS64-NEXT: daddu $2, $2, $1 303 entry: 304 %b = mul i64 %a, 42949673 305 ret i64 %b 306 } 307 308 define i32 @mul22224078_32(i32 %a) { 309 ; MIPS32-LABEL: mul22224078_32: 310 ; MIPS32: # %bb.0: # %entry 311 ; MIPS32-NEXT: sll $1, $4, 1 312 ; MIPS32-NEXT: sll $2, $4, 4 313 ; MIPS32-NEXT: subu $1, $2, $1 314 ; MIPS32-NEXT: sll $2, $4, 6 315 ; MIPS32-NEXT: subu $1, $1, $2 316 ; MIPS32-NEXT: sll $2, $4, 8 317 ; MIPS32-NEXT: addu $1, $2, $1 318 ; MIPS32-NEXT: sll $2, $4, 10 319 ; MIPS32-NEXT: subu $1, $1, $2 320 ; MIPS32-NEXT: sll $2, $4, 13 321 ; MIPS32-NEXT: addu $1, $2, $1 322 ; MIPS32-NEXT: sll $2, $4, 16 323 ; MIPS32-NEXT: subu $1, $1, $2 324 ; MIPS32-NEXT: sll $2, $4, 24 325 ; MIPS32-NEXT: sll $3, $4, 22 326 ; MIPS32-NEXT: sll $5, $4, 20 327 ; MIPS32-NEXT: sll $4, $4, 18 328 ; MIPS32-NEXT: addu $1, $4, $1 329 ; MIPS32-NEXT: addu $1, $5, $1 330 ; MIPS32-NEXT: addu $1, $3, $1 331 ; MIPS32-NEXT: jr $ra 332 ; MIPS32-NEXT: addu $2, $2, $1 333 ; 334 ; MIPS64-LABEL: mul22224078_32: 335 ; MIPS64: # %bb.0: # %entry 336 ; MIPS64-NEXT: sll $1, $4, 0 337 ; MIPS64-NEXT: sll $2, $1, 1 338 ; MIPS64-NEXT: sll $3, $1, 4 339 ; MIPS64-NEXT: subu $2, $3, $2 340 ; MIPS64-NEXT: sll $3, $1, 6 341 ; MIPS64-NEXT: subu $2, $2, $3 342 ; MIPS64-NEXT: sll $3, $1, 8 343 ; MIPS64-NEXT: addu $2, $3, $2 344 ; MIPS64-NEXT: sll $3, $1, 10 345 ; MIPS64-NEXT: subu $2, $2, $3 346 ; MIPS64-NEXT: sll $3, $1, 13 347 ; MIPS64-NEXT: addu $2, $3, $2 348 ; MIPS64-NEXT: sll $3, $1, 16 349 ; MIPS64-NEXT: subu $2, $2, $3 350 ; MIPS64-NEXT: sll $3, $1, 24 351 ; MIPS64-NEXT: sll $4, $1, 22 352 ; MIPS64-NEXT: sll $5, $1, 20 353 ; MIPS64-NEXT: sll $1, $1, 18 354 ; MIPS64-NEXT: addu $1, $1, $2 355 ; MIPS64-NEXT: addu $1, $5, $1 356 ; MIPS64-NEXT: addu $1, $4, $1 357 ; MIPS64-NEXT: jr $ra 358 ; MIPS64-NEXT: addu $2, $3, $1 359 entry: 360 %b = mul i32 %a, 22224078 361 ret i32 %b 362 } 363 364 define i64 @mul22224078_64(i64 %a) { 365 ; MIPS32-LABEL: mul22224078_64: 366 ; MIPS32: # %bb.0: # %entry 367 ; MIPS32-NEXT: lui $1, 339 368 ; MIPS32-NEXT: ori $1, $1, 7374 369 ; MIPS32-NEXT: multu $4, $1 370 ; MIPS32-NEXT: mflo $2 371 ; MIPS32-NEXT: mfhi $1 372 ; MIPS32-NEXT: sll $3, $5, 1 373 ; MIPS32-NEXT: sll $4, $5, 4 374 ; MIPS32-NEXT: subu $3, $4, $3 375 ; MIPS32-NEXT: sll $4, $5, 6 376 ; MIPS32-NEXT: subu $3, $3, $4 377 ; MIPS32-NEXT: sll $4, $5, 8 378 ; MIPS32-NEXT: addu $3, $4, $3 379 ; MIPS32-NEXT: sll $4, $5, 10 380 ; MIPS32-NEXT: subu $3, $3, $4 381 ; MIPS32-NEXT: sll $4, $5, 13 382 ; MIPS32-NEXT: addu $3, $4, $3 383 ; MIPS32-NEXT: sll $4, $5, 16 384 ; MIPS32-NEXT: subu $3, $3, $4 385 ; MIPS32-NEXT: sll $4, $5, 24 386 ; MIPS32-NEXT: sll $6, $5, 22 387 ; MIPS32-NEXT: sll $7, $5, 20 388 ; MIPS32-NEXT: sll $5, $5, 18 389 ; MIPS32-NEXT: addu $3, $5, $3 390 ; MIPS32-NEXT: addu $3, $7, $3 391 ; MIPS32-NEXT: addu $3, $6, $3 392 ; MIPS32-NEXT: addu $3, $4, $3 393 ; MIPS32-NEXT: jr $ra 394 ; MIPS32-NEXT: addu $3, $1, $3 395 ; 396 ; MIPS64-LABEL: mul22224078_64: 397 ; MIPS64: # %bb.0: # %entry 398 ; MIPS64-NEXT: dsll $1, $4, 1 399 ; MIPS64-NEXT: dsll $2, $4, 4 400 ; MIPS64-NEXT: dsubu $1, $2, $1 401 ; MIPS64-NEXT: dsll $2, $4, 6 402 ; MIPS64-NEXT: dsubu $1, $1, $2 403 ; MIPS64-NEXT: dsll $2, $4, 8 404 ; MIPS64-NEXT: daddu $1, $2, $1 405 ; MIPS64-NEXT: dsll $2, $4, 10 406 ; MIPS64-NEXT: dsubu $1, $1, $2 407 ; MIPS64-NEXT: dsll $2, $4, 13 408 ; MIPS64-NEXT: daddu $1, $2, $1 409 ; MIPS64-NEXT: dsll $2, $4, 16 410 ; MIPS64-NEXT: dsubu $1, $1, $2 411 ; MIPS64-NEXT: dsll $2, $4, 24 412 ; MIPS64-NEXT: dsll $3, $4, 22 413 ; MIPS64-NEXT: dsll $5, $4, 20 414 ; MIPS64-NEXT: dsll $4, $4, 18 415 ; MIPS64-NEXT: daddu $1, $4, $1 416 ; MIPS64-NEXT: daddu $1, $5, $1 417 ; MIPS64-NEXT: daddu $1, $3, $1 418 ; MIPS64-NEXT: jr $ra 419 ; MIPS64-NEXT: daddu $2, $2, $1 420 entry: 421 %b = mul i64 %a, 22224078 422 ret i64 %b 423 } 424 425 define i32 @mul22245375_32(i32 %a) { 426 ; MIPS32-LABEL: mul22245375_32: 427 ; MIPS32: # %bb.0: # %entry 428 ; MIPS32-NEXT: sll $1, $4, 12 429 ; MIPS32-NEXT: addu $1, $1, $4 430 ; MIPS32-NEXT: sll $2, $4, 15 431 ; MIPS32-NEXT: addu $1, $2, $1 432 ; MIPS32-NEXT: sll $2, $4, 18 433 ; MIPS32-NEXT: subu $1, $2, $1 434 ; MIPS32-NEXT: sll $2, $4, 20 435 ; MIPS32-NEXT: addu $1, $2, $1 436 ; MIPS32-NEXT: sll $2, $4, 22 437 ; MIPS32-NEXT: addu $1, $2, $1 438 ; MIPS32-NEXT: sll $2, $4, 24 439 ; MIPS32-NEXT: jr $ra 440 ; MIPS32-NEXT: addu $2, $2, $1 441 ; 442 ; MIPS64-LABEL: mul22245375_32: 443 ; MIPS64: # %bb.0: # %entry 444 ; MIPS64-NEXT: sll $1, $4, 0 445 ; MIPS64-NEXT: sll $2, $1, 12 446 ; MIPS64-NEXT: addu $2, $2, $1 447 ; MIPS64-NEXT: sll $3, $1, 15 448 ; MIPS64-NEXT: addu $2, $3, $2 449 ; MIPS64-NEXT: sll $3, $1, 18 450 ; MIPS64-NEXT: subu $2, $3, $2 451 ; MIPS64-NEXT: sll $3, $1, 20 452 ; MIPS64-NEXT: addu $2, $3, $2 453 ; MIPS64-NEXT: sll $3, $1, 22 454 ; MIPS64-NEXT: addu $2, $3, $2 455 ; MIPS64-NEXT: sll $1, $1, 24 456 ; MIPS64-NEXT: jr $ra 457 ; MIPS64-NEXT: addu $2, $1, $2 458 entry: 459 %b = mul i32 %a, 22245375 460 ret i32 %b 461 } 462 463 define i64 @mul22245375_64(i64 %a) { 464 ; MIPS32-LABEL: mul22245375_64: 465 ; MIPS32: # %bb.0: # %entry 466 ; MIPS32-NEXT: lui $1, 339 467 ; MIPS32-NEXT: ori $1, $1, 28671 468 ; MIPS32-NEXT: multu $4, $1 469 ; MIPS32-NEXT: mflo $2 470 ; MIPS32-NEXT: mfhi $1 471 ; MIPS32-NEXT: sll $3, $5, 12 472 ; MIPS32-NEXT: addu $3, $3, $5 473 ; MIPS32-NEXT: sll $4, $5, 15 474 ; MIPS32-NEXT: addu $3, $4, $3 475 ; MIPS32-NEXT: sll $4, $5, 18 476 ; MIPS32-NEXT: subu $3, $4, $3 477 ; MIPS32-NEXT: sll $4, $5, 20 478 ; MIPS32-NEXT: addu $3, $4, $3 479 ; MIPS32-NEXT: sll $4, $5, 22 480 ; MIPS32-NEXT: addu $3, $4, $3 481 ; MIPS32-NEXT: sll $4, $5, 24 482 ; MIPS32-NEXT: addu $3, $4, $3 483 ; MIPS32-NEXT: jr $ra 484 ; MIPS32-NEXT: addu $3, $1, $3 485 ; 486 ; MIPS64-LABEL: mul22245375_64: 487 ; MIPS64: # %bb.0: # %entry 488 ; MIPS64-NEXT: dsll $1, $4, 12 489 ; MIPS64-NEXT: daddu $1, $1, $4 490 ; MIPS64-NEXT: dsll $2, $4, 15 491 ; MIPS64-NEXT: daddu $1, $2, $1 492 ; MIPS64-NEXT: dsll $2, $4, 18 493 ; MIPS64-NEXT: dsubu $1, $2, $1 494 ; MIPS64-NEXT: dsll $2, $4, 20 495 ; MIPS64-NEXT: daddu $1, $2, $1 496 ; MIPS64-NEXT: dsll $2, $4, 22 497 ; MIPS64-NEXT: daddu $1, $2, $1 498 ; MIPS64-NEXT: dsll $2, $4, 24 499 ; MIPS64-NEXT: jr $ra 500 ; MIPS64-NEXT: daddu $2, $2, $1 501 entry: 502 %b = mul i64 %a, 22245375 503 ret i64 %b 504 } 505 506 define i32 @mul25165824_32(i32 %a) { 507 ; MIPS32-LABEL: mul25165824_32: 508 ; MIPS32: # %bb.0: # %entry 509 ; MIPS32-NEXT: sll $1, $4, 12 510 ; MIPS32-NEXT: addu $1, $1, $4 511 ; MIPS32-NEXT: sll $2, $4, 15 512 ; MIPS32-NEXT: addu $1, $2, $1 513 ; MIPS32-NEXT: sll $2, $4, 18 514 ; MIPS32-NEXT: subu $1, $2, $1 515 ; MIPS32-NEXT: sll $2, $4, 20 516 ; MIPS32-NEXT: addu $1, $2, $1 517 ; MIPS32-NEXT: sll $2, $4, 22 518 ; MIPS32-NEXT: addu $1, $2, $1 519 ; MIPS32-NEXT: sll $2, $4, 24 520 ; MIPS32-NEXT: jr $ra 521 ; MIPS32-NEXT: addu $2, $2, $1 522 ; 523 ; MIPS64-LABEL: mul25165824_32: 524 ; MIPS64: # %bb.0: # %entry 525 ; MIPS64-NEXT: sll $1, $4, 0 526 ; MIPS64-NEXT: sll $2, $1, 12 527 ; MIPS64-NEXT: addu $2, $2, $1 528 ; MIPS64-NEXT: sll $3, $1, 15 529 ; MIPS64-NEXT: addu $2, $3, $2 530 ; MIPS64-NEXT: sll $3, $1, 18 531 ; MIPS64-NEXT: subu $2, $3, $2 532 ; MIPS64-NEXT: sll $3, $1, 20 533 ; MIPS64-NEXT: addu $2, $3, $2 534 ; MIPS64-NEXT: sll $3, $1, 22 535 ; MIPS64-NEXT: addu $2, $3, $2 536 ; MIPS64-NEXT: sll $1, $1, 24 537 ; MIPS64-NEXT: jr $ra 538 ; MIPS64-NEXT: addu $2, $1, $2 539 entry: 540 %b = mul i32 %a, 22245375 541 ret i32 %b 542 } 543 544 define i64 @mul25165824_64(i64 %a) { 545 ; MIPS32-LABEL: mul25165824_64: 546 ; MIPS32: # %bb.0: # %entry 547 ; MIPS32-NEXT: srl $1, $4, 9 548 ; MIPS32-NEXT: sll $2, $5, 23 549 ; MIPS32-NEXT: or $1, $2, $1 550 ; MIPS32-NEXT: srl $2, $4, 8 551 ; MIPS32-NEXT: sll $3, $5, 24 552 ; MIPS32-NEXT: or $2, $3, $2 553 ; MIPS32-NEXT: addu $1, $2, $1 554 ; MIPS32-NEXT: sll $2, $4, 23 555 ; MIPS32-NEXT: sll $3, $4, 24 556 ; MIPS32-NEXT: addu $2, $3, $2 557 ; MIPS32-NEXT: sltu $3, $2, $3 558 ; MIPS32-NEXT: jr $ra 559 ; MIPS32-NEXT: addu $3, $1, $3 560 ; 561 ; MIPS64-LABEL: mul25165824_64: 562 ; MIPS64: # %bb.0: # %entry 563 ; MIPS64-NEXT: dsll $1, $4, 23 564 ; MIPS64-NEXT: dsll $2, $4, 24 565 ; MIPS64-NEXT: jr $ra 566 ; MIPS64-NEXT: daddu $2, $2, $1 567 entry: 568 %b = mul i64 %a, 25165824 569 ret i64 %b 570 } 571 572 define i32 @mul33554432_32(i32 %a) { 573 ; MIPS32-LABEL: mul33554432_32: 574 ; MIPS32: # %bb.0: # %entry 575 ; MIPS32-NEXT: sll $1, $4, 12 576 ; MIPS32-NEXT: addu $1, $1, $4 577 ; MIPS32-NEXT: sll $2, $4, 15 578 ; MIPS32-NEXT: addu $1, $2, $1 579 ; MIPS32-NEXT: sll $2, $4, 18 580 ; MIPS32-NEXT: subu $1, $2, $1 581 ; MIPS32-NEXT: sll $2, $4, 20 582 ; MIPS32-NEXT: addu $1, $2, $1 583 ; MIPS32-NEXT: sll $2, $4, 22 584 ; MIPS32-NEXT: addu $1, $2, $1 585 ; MIPS32-NEXT: sll $2, $4, 24 586 ; MIPS32-NEXT: jr $ra 587 ; MIPS32-NEXT: addu $2, $2, $1 588 ; 589 ; MIPS64-LABEL: mul33554432_32: 590 ; MIPS64: # %bb.0: # %entry 591 ; MIPS64-NEXT: sll $1, $4, 0 592 ; MIPS64-NEXT: sll $2, $1, 12 593 ; MIPS64-NEXT: addu $2, $2, $1 594 ; MIPS64-NEXT: sll $3, $1, 15 595 ; MIPS64-NEXT: addu $2, $3, $2 596 ; MIPS64-NEXT: sll $3, $1, 18 597 ; MIPS64-NEXT: subu $2, $3, $2 598 ; MIPS64-NEXT: sll $3, $1, 20 599 ; MIPS64-NEXT: addu $2, $3, $2 600 ; MIPS64-NEXT: sll $3, $1, 22 601 ; MIPS64-NEXT: addu $2, $3, $2 602 ; MIPS64-NEXT: sll $1, $1, 24 603 ; MIPS64-NEXT: jr $ra 604 ; MIPS64-NEXT: addu $2, $1, $2 605 entry: 606 %b = mul i32 %a, 22245375 607 ret i32 %b 608 } 609 610 define i64 @mul33554432_64(i64 %a) { 611 ; MIPS32-LABEL: mul33554432_64: 612 ; MIPS32: # %bb.0: # %entry 613 ; MIPS32-NEXT: srl $1, $4, 7 614 ; MIPS32-NEXT: sll $2, $5, 25 615 ; MIPS32-NEXT: or $3, $2, $1 616 ; MIPS32-NEXT: jr $ra 617 ; MIPS32-NEXT: sll $2, $4, 25 618 ; 619 ; MIPS64-LABEL: mul33554432_64: 620 ; MIPS64: # %bb.0: # %entry 621 ; MIPS64-NEXT: jr $ra 622 ; MIPS64-NEXT: dsll $2, $4, 25 623 entry: 624 %b = mul i64 %a, 33554432 625 ret i64 %b 626 } 627