1 ; RUN: llc < %s -march=mipsel -relocation-model=pic | FileCheck %s 2 ; RUN: llc < %s -mtriple=mipsel-none-nacl-gnu -relocation-model=pic -mips-tail-calls=1\ 3 ; RUN: | FileCheck %s -check-prefix=CHECK-NACL 4 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -mattr=+nooddspreg -relocation-model=pic -mips-tail-calls=1| FileCheck %s -check-prefix=NOODDSPREG 5 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+fp64,+nooddspreg -relocation-model=pic -mips-tail-calls=1 | FileCheck %s -check-prefix=FP64-NOODDSPREG 6 7 8 @gi0 = external global i32 9 @gi1 = external global i32 10 @gi2 = external global i32 11 @gi3 = external global i32 12 @gi4 = external global i32 13 @gi5 = external global i32 14 @gi6 = external global i32 15 @gi7 = external global i32 16 @gi8 = external global i32 17 @gi9 = external global i32 18 @gi10 = external global i32 19 @gi11 = external global i32 20 @gi12 = external global i32 21 @gi13 = external global i32 22 @gi14 = external global i32 23 @gi15 = external global i32 24 @gi16 = external global i32 25 @gfa0 = external global float 26 @gfa1 = external global float 27 @gfa2 = external global float 28 @gfa3 = external global float 29 @gfa4 = external global float 30 @gfa5 = external global float 31 @gfa6 = external global float 32 @gfa7 = external global float 33 @gfa8 = external global float 34 @gfa9 = external global float 35 @gfa10 = external global float 36 @gfa11 = external global float 37 @gfa12 = external global float 38 @gfa13 = external global float 39 @gfa14 = external global float 40 @gfa15 = external global float 41 @gfa16 = external global float 42 @gfa17 = external global float 43 @gfa18 = external global float 44 @gfa19 = external global float 45 @gfa20 = external global float 46 @gf0 = external global float 47 @gf1 = external global float 48 @gf2 = external global float 49 @gf3 = external global float 50 @gf4 = external global float 51 @gf5 = external global float 52 @gf6 = external global float 53 @gf7 = external global float 54 @gf8 = external global float 55 @gf9 = external global float 56 @gf10 = external global float 57 @gf11 = external global float 58 @gf12 = external global float 59 @gf13 = external global float 60 @gf14 = external global float 61 @gf15 = external global float 62 @gf16 = external global float 63 @gf17 = external global float 64 @gf18 = external global float 65 @gf19 = external global float 66 @gf20 = external global float 67 @g0 = external global i32 68 @g1 = external global i32 69 @g2 = external global i32 70 @g3 = external global i32 71 @g4 = external global i32 72 @g5 = external global i32 73 @g6 = external global i32 74 @g7 = external global i32 75 @g8 = external global i32 76 @g9 = external global i32 77 @g10 = external global i32 78 @g11 = external global i32 79 @g12 = external global i32 80 @g13 = external global i32 81 @g14 = external global i32 82 @g15 = external global i32 83 @g16 = external global i32 84 85 @fa = common global [11 x float] zeroinitializer, align 4 86 @da = common global [11 x double] zeroinitializer, align 8 87 88 define void @caller0() nounwind { 89 entry: 90 ; CHECK: caller0 91 ; CHECK: lw $3 92 ; CHECK: lw $24 93 ; CHECK: lw $15 94 ; CHECK: lw $14 95 ; CHECK: lw $13 96 ; CHECK: lw $12 97 ; CHECK: lw $11 98 ; CHECK: lw $10 99 ; CHECK: lw $9 100 ; CHECK: lw $8 101 ; CHECK: lw $7 102 ; CHECK: lw $6 103 ; CHECK: lw $5 104 ; CHECK: lw $4 105 106 ; t6, t7 and t8 are reserved in NaCl and cannot be used for fastcc. 107 ; CHECK-NACL-NOT: lw $14 108 ; CHECK-NACL-NOT: lw $15 109 ; CHECK-NACL-NOT: lw $24 110 111 %0 = load i32, i32* @gi0, align 4 112 %1 = load i32, i32* @gi1, align 4 113 %2 = load i32, i32* @gi2, align 4 114 %3 = load i32, i32* @gi3, align 4 115 %4 = load i32, i32* @gi4, align 4 116 %5 = load i32, i32* @gi5, align 4 117 %6 = load i32, i32* @gi6, align 4 118 %7 = load i32, i32* @gi7, align 4 119 %8 = load i32, i32* @gi8, align 4 120 %9 = load i32, i32* @gi9, align 4 121 %10 = load i32, i32* @gi10, align 4 122 %11 = load i32, i32* @gi11, align 4 123 %12 = load i32, i32* @gi12, align 4 124 %13 = load i32, i32* @gi13, align 4 125 %14 = load i32, i32* @gi14, align 4 126 %15 = load i32, i32* @gi15, align 4 127 %16 = load i32, i32* @gi16, align 4 128 tail call fastcc void @callee0(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, i32 %14, i32 %15, i32 %16) 129 ret void 130 } 131 132 define internal fastcc void @callee0(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15, i32 %a16) nounwind noinline { 133 entry: 134 ; CHECK: callee0 135 ; CHECK-DAG: sw $4 136 ; CHECK-DAG: sw $5 137 ; CHECK-DAG: sw $7 138 ; CHECK-DAG: sw $8 139 ; CHECK-DAG: sw $9 140 ; CHECK-DAG: sw $10 141 ; CHECK-DAG: sw $11 142 ; CHECK-DAG: sw $12 143 ; CHECK-DAG: sw $13 144 ; CHECK-DAG: sw $14 145 ; CHECK-DAG: sw $15 146 ; CHECK-DAG: sw $24 147 ; CHECK-DAG: sw $3 148 149 ; t6, t7 and t8 are reserved in NaCl and cannot be used for fastcc. 150 ; CHECK-NACL-NOT: sw $14 151 ; CHECK-NACL-NOT: sw $15 152 ; CHECK-NACL-NOT: sw $24 153 154 store i32 %a0, i32* @g0, align 4 155 store i32 %a1, i32* @g1, align 4 156 store i32 %a2, i32* @g2, align 4 157 store i32 %a3, i32* @g3, align 4 158 store i32 %a4, i32* @g4, align 4 159 store i32 %a5, i32* @g5, align 4 160 store i32 %a6, i32* @g6, align 4 161 store i32 %a7, i32* @g7, align 4 162 store i32 %a8, i32* @g8, align 4 163 store i32 %a9, i32* @g9, align 4 164 store i32 %a10, i32* @g10, align 4 165 store i32 %a11, i32* @g11, align 4 166 store i32 %a12, i32* @g12, align 4 167 store i32 %a13, i32* @g13, align 4 168 store i32 %a14, i32* @g14, align 4 169 store i32 %a15, i32* @g15, align 4 170 store i32 %a16, i32* @g16, align 4 171 ret void 172 } 173 174 define void @caller1(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7, float %a8, float %a9, float %a10, float %a11, float %a12, float %a13, float %a14, float %a15, float %a16, float %a17, float %a18, float %a19, float %a20) nounwind { 175 entry: 176 ; CHECK: caller1 177 ; CHECK: lwc1 $f19 178 ; CHECK: lwc1 $f18 179 ; CHECK: lwc1 $f17 180 ; CHECK: lwc1 $f16 181 ; CHECK: lwc1 $f15 182 ; CHECK: lwc1 $f14 183 ; CHECK: lwc1 $f13 184 ; CHECK: lwc1 $f12 185 ; CHECK: lwc1 $f11 186 ; CHECK: lwc1 $f10 187 ; CHECK: lwc1 $f9 188 ; CHECK: lwc1 $f8 189 ; CHECK: lwc1 $f7 190 ; CHECK: lwc1 $f6 191 ; CHECK: lwc1 $f5 192 ; CHECK: lwc1 $f4 193 ; CHECK: lwc1 $f3 194 ; CHECK: lwc1 $f2 195 ; CHECK: lwc1 $f1 196 ; CHECK: lwc1 $f0 197 198 %0 = load float, float* @gfa0, align 4 199 %1 = load float, float* @gfa1, align 4 200 %2 = load float, float* @gfa2, align 4 201 %3 = load float, float* @gfa3, align 4 202 %4 = load float, float* @gfa4, align 4 203 %5 = load float, float* @gfa5, align 4 204 %6 = load float, float* @gfa6, align 4 205 %7 = load float, float* @gfa7, align 4 206 %8 = load float, float* @gfa8, align 4 207 %9 = load float, float* @gfa9, align 4 208 %10 = load float, float* @gfa10, align 4 209 %11 = load float, float* @gfa11, align 4 210 %12 = load float, float* @gfa12, align 4 211 %13 = load float, float* @gfa13, align 4 212 %14 = load float, float* @gfa14, align 4 213 %15 = load float, float* @gfa15, align 4 214 %16 = load float, float* @gfa16, align 4 215 %17 = load float, float* @gfa17, align 4 216 %18 = load float, float* @gfa18, align 4 217 %19 = load float, float* @gfa19, align 4 218 %20 = load float, float* @gfa20, align 4 219 tail call fastcc void @callee1(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13, float %14, float %15, float %16, float %17, float %18, float %19, float %20) 220 ret void 221 } 222 223 define internal fastcc void @callee1(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7, float %a8, float %a9, float %a10, float %a11, float %a12, float %a13, float %a14, float %a15, float %a16, float %a17, float %a18, float %a19, float %a20) nounwind noinline { 224 entry: 225 ; CHECK-LABEL: callee1: 226 ; CHECK-DAG: swc1 $f0 227 ; CHECK-DAG: swc1 $f1 228 ; CHECK-DAG: swc1 $f2 229 ; CHECK-DAG: swc1 $f3 230 ; CHECK-DAG: swc1 $f4 231 ; CHECK-DAG: swc1 $f5 232 ; CHECK-DAG: swc1 $f6 233 ; CHECK-DAG: swc1 $f7 234 ; CHECK-DAG: swc1 $f8 235 ; CHECK-DAG: swc1 $f9 236 ; CHECK-DAG: swc1 $f10 237 ; CHECK-DAG: swc1 $f11 238 ; CHECK-DAG: swc1 $f12 239 ; CHECK-DAG: swc1 $f13 240 ; CHECK-DAG: swc1 $f14 241 ; CHECK-DAG: swc1 $f15 242 ; CHECK-DAG: swc1 $f16 243 ; CHECK-DAG: swc1 $f17 244 ; CHECK-DAG: swc1 $f18 245 ; CHECK-DAG: swc1 $f19 246 247 store float %a0, float* @gf0, align 4 248 store float %a1, float* @gf1, align 4 249 store float %a2, float* @gf2, align 4 250 store float %a3, float* @gf3, align 4 251 store float %a4, float* @gf4, align 4 252 store float %a5, float* @gf5, align 4 253 store float %a6, float* @gf6, align 4 254 store float %a7, float* @gf7, align 4 255 store float %a8, float* @gf8, align 4 256 store float %a9, float* @gf9, align 4 257 store float %a10, float* @gf10, align 4 258 store float %a11, float* @gf11, align 4 259 store float %a12, float* @gf12, align 4 260 store float %a13, float* @gf13, align 4 261 store float %a14, float* @gf14, align 4 262 store float %a15, float* @gf15, align 4 263 store float %a16, float* @gf16, align 4 264 store float %a17, float* @gf17, align 4 265 store float %a18, float* @gf18, align 4 266 store float %a19, float* @gf19, align 4 267 store float %a20, float* @gf20, align 4 268 ret void 269 } 270 271 define void @caller2() { 272 entry: 273 274 ; NOODDSPREG-LABEL: caller2: 275 276 ; Check that first 10 arguments are passed in even float registers 277 ; f0, f2, ... , f18. Check that 11th argument is passed on stack. 278 279 ; NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(fa)(${{[0-9]+|gp}}) 280 ; NOODDSPREG-DAG: lwc1 $f0, 0($[[R0]]) 281 ; NOODDSPREG-DAG: lwc1 $f2, 4($[[R0]]) 282 ; NOODDSPREG-DAG: lwc1 $f4, 8($[[R0]]) 283 ; NOODDSPREG-DAG: lwc1 $f6, 12($[[R0]]) 284 ; NOODDSPREG-DAG: lwc1 $f8, 16($[[R0]]) 285 ; NOODDSPREG-DAG: lwc1 $f10, 20($[[R0]]) 286 ; NOODDSPREG-DAG: lwc1 $f12, 24($[[R0]]) 287 ; NOODDSPREG-DAG: lwc1 $f14, 28($[[R0]]) 288 ; NOODDSPREG-DAG: lwc1 $f16, 32($[[R0]]) 289 ; NOODDSPREG-DAG: lwc1 $f18, 36($[[R0]]) 290 291 ; NOODDSPREG-DAG: lwc1 $[[F0:f[0-9]*[02468]]], 40($[[R0]]) 292 ; NOODDSPREG-DAG: swc1 $[[F0]], 0($sp) 293 294 %0 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 0), align 4 295 %1 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 1), align 4 296 %2 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 2), align 4 297 %3 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 3), align 4 298 %4 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 4), align 4 299 %5 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 5), align 4 300 %6 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 6), align 4 301 %7 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 7), align 4 302 %8 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 8), align 4 303 %9 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 9), align 4 304 %10 = load float, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 10), align 4 305 tail call fastcc void @callee2(float %0, float %1, float %2, float %3, 306 float %4, float %5, float %6, float %7, 307 float %8, float %9, float %10) 308 ret void 309 } 310 311 define fastcc void @callee2(float %a0, float %a1, float %a2, float %a3, 312 float %a4, float %a5, float %a6, float %a7, 313 float %a8, float %a9, float %a10) { 314 entry: 315 316 ; NOODDSPREG-LABEL: callee2: 317 318 ; Check that first 10 arguments are received in even float registers 319 ; f0, f2, ... , f18. Check that 11th argument is received on stack. 320 321 ; NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(fa)(${{[0-9]+|gp}}) 322 ; NOODDSPREG-DAG: swc1 $f0, 0($[[R0]]) 323 ; NOODDSPREG-DAG: swc1 $f2, 4($[[R0]]) 324 ; NOODDSPREG-DAG: swc1 $f4, 8($[[R0]]) 325 ; NOODDSPREG-DAG: swc1 $f6, 12($[[R0]]) 326 ; NOODDSPREG-DAG: swc1 $f8, 16($[[R0]]) 327 ; NOODDSPREG-DAG: swc1 $f10, 20($[[R0]]) 328 ; NOODDSPREG-DAG: swc1 $f12, 24($[[R0]]) 329 ; NOODDSPREG-DAG: swc1 $f14, 28($[[R0]]) 330 ; NOODDSPREG-DAG: swc1 $f16, 32($[[R0]]) 331 ; NOODDSPREG-DAG: swc1 $f18, 36($[[R0]]) 332 333 ; NOODDSPREG-DAG: lwc1 $[[F0:f[0-9]*[02468]]], 0($sp) 334 ; NOODDSPREG-DAG: swc1 $[[F0]], 40($[[R0]]) 335 336 store float %a0, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 0), align 4 337 store float %a1, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 1), align 4 338 store float %a2, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 2), align 4 339 store float %a3, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 3), align 4 340 store float %a4, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 4), align 4 341 store float %a5, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 5), align 4 342 store float %a6, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 6), align 4 343 store float %a7, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 7), align 4 344 store float %a8, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 8), align 4 345 store float %a9, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 9), align 4 346 store float %a10, float* getelementptr ([11 x float], [11 x float]* @fa, i32 0, i32 10), align 4 347 ret void 348 } 349 350 define void @caller3() { 351 entry: 352 353 ; FP64-NOODDSPREG-LABEL: caller3: 354 355 ; Check that first 10 arguments are passed in even float registers 356 ; f0, f2, ... , f18. Check that 11th argument is passed on stack. 357 358 ; FP64-NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(da)(${{[0-9]+|gp}}) 359 ; FP64-NOODDSPREG-DAG: ldc1 $f0, 0($[[R0]]) 360 ; FP64-NOODDSPREG-DAG: ldc1 $f2, 8($[[R0]]) 361 ; FP64-NOODDSPREG-DAG: ldc1 $f4, 16($[[R0]]) 362 ; FP64-NOODDSPREG-DAG: ldc1 $f6, 24($[[R0]]) 363 ; FP64-NOODDSPREG-DAG: ldc1 $f8, 32($[[R0]]) 364 ; FP64-NOODDSPREG-DAG: ldc1 $f10, 40($[[R0]]) 365 ; FP64-NOODDSPREG-DAG: ldc1 $f12, 48($[[R0]]) 366 ; FP64-NOODDSPREG-DAG: ldc1 $f14, 56($[[R0]]) 367 ; FP64-NOODDSPREG-DAG: ldc1 $f16, 64($[[R0]]) 368 ; FP64-NOODDSPREG-DAG: ldc1 $f18, 72($[[R0]]) 369 370 ; FP64-NOODDSPREG-DAG: ldc1 $[[F0:f[0-9]*[02468]]], 80($[[R0]]) 371 ; FP64-NOODDSPREG-DAG: sdc1 $[[F0]], 0($sp) 372 373 %0 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 0), align 8 374 %1 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 1), align 8 375 %2 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 2), align 8 376 %3 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 3), align 8 377 %4 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 4), align 8 378 %5 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 5), align 8 379 %6 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 6), align 8 380 %7 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 7), align 8 381 %8 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 8), align 8 382 %9 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 9), align 8 383 %10 = load double, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 10), align 8 384 tail call fastcc void @callee3(double %0, double %1, double %2, double %3, 385 double %4, double %5, double %6, double %7, 386 double %8, double %9, double %10) 387 ret void 388 } 389 390 define fastcc void @callee3(double %a0, double %a1, double %a2, double %a3, 391 double %a4, double %a5, double %a6, double %a7, 392 double %a8, double %a9, double %a10) { 393 entry: 394 395 ; FP64-NOODDSPREG-LABEL: callee3: 396 397 398 ; Check that first 10 arguments are received in even float registers 399 ; f0, f2, ... , f18. Check that 11th argument is received on stack. 400 401 ; FP64-NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(da)(${{[0-9]+|gp}}) 402 ; FP64-NOODDSPREG-DAG: sdc1 $f0, 0($[[R0]]) 403 ; FP64-NOODDSPREG-DAG: sdc1 $f2, 8($[[R0]]) 404 ; FP64-NOODDSPREG-DAG: sdc1 $f4, 16($[[R0]]) 405 ; FP64-NOODDSPREG-DAG: sdc1 $f6, 24($[[R0]]) 406 ; FP64-NOODDSPREG-DAG: sdc1 $f8, 32($[[R0]]) 407 ; FP64-NOODDSPREG-DAG: sdc1 $f10, 40($[[R0]]) 408 ; FP64-NOODDSPREG-DAG: sdc1 $f12, 48($[[R0]]) 409 ; FP64-NOODDSPREG-DAG: sdc1 $f14, 56($[[R0]]) 410 ; FP64-NOODDSPREG-DAG: sdc1 $f16, 64($[[R0]]) 411 ; FP64-NOODDSPREG-DAG: sdc1 $f18, 72($[[R0]]) 412 413 ; FP64-NOODDSPREG-DAG: ldc1 $[[F0:f[0-9]*[02468]]], 0($sp) 414 ; FP64-NOODDSPREG-DAG: sdc1 $[[F0]], 80($[[R0]]) 415 416 store double %a0, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 0), align 8 417 store double %a1, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 1), align 8 418 store double %a2, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 2), align 8 419 store double %a3, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 3), align 8 420 store double %a4, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 4), align 8 421 store double %a5, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 5), align 8 422 store double %a6, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 6), align 8 423 store double %a7, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 7), align 8 424 store double %a8, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 8), align 8 425 store double %a9, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 9), align 8 426 store double %a10, double* getelementptr ([11 x double], [11 x double]* @da, i32 0, i32 10), align 8 427 ret void 428 } 429
