1 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,FCC,32-FCC 2 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,FCC,32-FCC 3 ; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,GPR,32-GPR 4 ; RUN: llc < %s -march=mips64el -mcpu=mips64 | FileCheck %s -check-prefixes=ALL,FCC,64-FCC 5 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,FCC,64-FCC 6 ; RUN: llc < %s -march=mips64el -mcpu=mips64r6 | FileCheck %s -check-prefixes=ALL,GPR,64-GPR 7 8 define void @func0(float %f2, float %f3) nounwind { 9 entry: 10 ; ALL-LABEL: func0: 11 12 ; 32-FCC: c.eq.s $f12, $f14 13 ; 32-FCC: bc1f $BB0_2 14 ; 64-FCC: c.eq.s $f12, $f13 15 ; 64-FCC: bc1f .LBB0_2 16 17 ; 32-GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $f14 18 ; 64-GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $f13 19 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 20 ; FIXME: We ought to be able to transform not+bnez -> beqz 21 ; GPR: not $[[GPRCC]], $[[GPRCC]] 22 ; 32-GPR: bnez $[[GPRCC]], $BB0_2 23 ; 64-GPR: bnezc $[[GPRCC]], .LBB0_2 24 25 %cmp = fcmp oeq float %f2, %f3 26 br i1 %cmp, label %if.then, label %if.else 27 28 if.then: ; preds = %entry 29 tail call void (...) @g0() nounwind 30 br label %if.end 31 32 if.else: ; preds = %entry 33 tail call void (...) @g1() nounwind 34 br label %if.end 35 36 if.end: ; preds = %if.else, %if.then 37 ret void 38 } 39 40 declare void @g0(...) 41 42 declare void @g1(...) 43 44 define void @func1(float %f2, float %f3) nounwind { 45 entry: 46 ; ALL-LABEL: func1: 47 48 ; 32-FCC: c.olt.s $f12, $f14 49 ; 32-FCC: bc1f $BB1_2 50 ; 64-FCC: c.olt.s $f12, $f13 51 ; 64-FCC: bc1f .LBB1_2 52 53 ; 32-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f14, $f12 54 ; 64-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f13, $f12 55 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 56 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 57 ; 32-GPR: bnez $[[GPRCC]], $BB1_2 58 ; 64-GPR: bnezc $[[GPRCC]], .LBB1_2 59 60 %cmp = fcmp olt float %f2, %f3 61 br i1 %cmp, label %if.then, label %if.else 62 63 if.then: ; preds = %entry 64 tail call void (...) @g0() nounwind 65 br label %if.end 66 67 if.else: ; preds = %entry 68 tail call void (...) @g1() nounwind 69 br label %if.end 70 71 if.end: ; preds = %if.else, %if.then 72 ret void 73 } 74 75 define void @func2(float %f2, float %f3) nounwind { 76 entry: 77 ; ALL-LABEL: func2: 78 79 ; 32-FCC: c.ole.s $f12, $f14 80 ; 32-FCC: bc1t $BB2_2 81 ; 64-FCC: c.ole.s $f12, $f13 82 ; 64-FCC: bc1t .LBB2_2 83 84 ; 32-GPR: cmp.ult.s $[[FGRCC:f[0-9]+]], $f14, $f12 85 ; 64-GPR: cmp.ult.s $[[FGRCC:f[0-9]+]], $f13, $f12 86 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 87 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 88 ; 32-GPR: beqz $[[GPRCC]], $BB2_2 89 ; 64-GPR: beqzc $[[GPRCC]], .LBB2_2 90 91 %cmp = fcmp ugt float %f2, %f3 92 br i1 %cmp, label %if.else, label %if.then 93 94 if.then: ; preds = %entry 95 tail call void (...) @g0() nounwind 96 br label %if.end 97 98 if.else: ; preds = %entry 99 tail call void (...) @g1() nounwind 100 br label %if.end 101 102 if.end: ; preds = %if.else, %if.then 103 ret void 104 } 105 106 define void @func3(double %f2, double %f3) nounwind { 107 entry: 108 ; ALL-LABEL: func3: 109 110 ; 32-FCC: c.eq.d $f12, $f14 111 ; 32-FCC: bc1f $BB3_2 112 ; 64-FCC: c.eq.d $f12, $f13 113 ; 64-FCC: bc1f .LBB3_2 114 115 ; 32-GPR: cmp.eq.d $[[FGRCC:f[0-9]+]], $f12, $f14 116 ; 64-GPR: cmp.eq.d $[[FGRCC:f[0-9]+]], $f12, $f13 117 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 118 ; FIXME: We ought to be able to transform not+bnez -> beqz 119 ; GPR: not $[[GPRCC]], $[[GPRCC]] 120 ; 32-GPR: bnez $[[GPRCC]], $BB3_2 121 ; 64-GPR: bnezc $[[GPRCC]], .LBB3_2 122 123 %cmp = fcmp oeq double %f2, %f3 124 br i1 %cmp, label %if.then, label %if.else 125 126 if.then: ; preds = %entry 127 tail call void (...) @g0() nounwind 128 br label %if.end 129 130 if.else: ; preds = %entry 131 tail call void (...) @g1() nounwind 132 br label %if.end 133 134 if.end: ; preds = %if.else, %if.then 135 ret void 136 } 137 138 define void @func4(double %f2, double %f3) nounwind { 139 entry: 140 ; ALL-LABEL: func4: 141 142 ; 32-FCC: c.olt.d $f12, $f14 143 ; 32-FCC: bc1f $BB4_2 144 ; 64-FCC: c.olt.d $f12, $f13 145 ; 64-FCC: bc1f .LBB4_2 146 147 ; 32-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f14, $f12 148 ; 64-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f13, $f12 149 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 150 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 151 ; 32-GPR: bnez $[[GPRCC]], $BB4_2 152 ; 64-GPR: bnezc $[[GPRCC]], .LBB4_2 153 154 %cmp = fcmp olt double %f2, %f3 155 br i1 %cmp, label %if.then, label %if.else 156 157 if.then: ; preds = %entry 158 tail call void (...) @g0() nounwind 159 br label %if.end 160 161 if.else: ; preds = %entry 162 tail call void (...) @g1() nounwind 163 br label %if.end 164 165 if.end: ; preds = %if.else, %if.then 166 ret void 167 } 168 169 define void @func5(double %f2, double %f3) nounwind { 170 entry: 171 ; ALL-LABEL: func5: 172 173 ; 32-FCC: c.ole.d $f12, $f14 174 ; 32-FCC: bc1t $BB5_2 175 ; 64-FCC: c.ole.d $f12, $f13 176 ; 64-FCC: bc1t .LBB5_2 177 178 ; 32-GPR: cmp.ult.d $[[FGRCC:f[0-9]+]], $f14, $f12 179 ; 64-GPR: cmp.ult.d $[[FGRCC:f[0-9]+]], $f13, $f12 180 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 181 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 182 ; 32-GPR: beqz $[[GPRCC]], $BB5_2 183 ; 64-GPR: beqzc $[[GPRCC]], .LBB5_2 184 185 %cmp = fcmp ugt double %f2, %f3 186 br i1 %cmp, label %if.else, label %if.then 187 188 if.then: ; preds = %entry 189 tail call void (...) @g0() nounwind 190 br label %if.end 191 192 if.else: ; preds = %entry 193 tail call void (...) @g1() nounwind 194 br label %if.end 195 196 if.end: ; preds = %if.else, %if.then 197 ret void 198 } 199
