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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+dsp < %s | FileCheck %s --check-prefix=DSP
      3 ; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+dsp,+micromips < %s | FileCheck %s --check-prefix=MMDSP
      4 
      5 define i64 @n(i64 %a, i64 %b) {
      6 ; DSP-LABEL: n:
      7 ; DSP:       # %bb.0: # %entry
      8 ; DSP-NEXT:    addsc $3, $7, $5
      9 ; DSP-NEXT:    addwc $2, $6, $4
     10 ; DSP-NEXT:    jr $ra
     11 ; DSP-NEXT:    nop
     12 ;
     13 ; MMDSP-LABEL: n:
     14 ; MMDSP:       # %bb.0: # %entry
     15 ; MMDSP-NEXT:    addsc $3, $7, $5
     16 ; MMDSP-NEXT:    addwc $2, $6, $4
     17 ; MMDSP-NEXT:    jrc $ra
     18 entry:
     19   %add = add i64 %b, %a
     20   ret i64 %add
     21 }
     22 
     23 define i128 @m(i128 zeroext %a, i128 zeroext %b) {
     24 ; DSP-LABEL: m:
     25 ; DSP:       # %bb.0: # %entry
     26 ; DSP-NEXT:    lw $1, 28($sp)
     27 ; DSP-NEXT:    lw $2, 24($sp)
     28 ; DSP-NEXT:    addsc $1, $1, $7
     29 ; DSP-NEXT:    addwc $6, $2, $6
     30 ; DSP-NEXT:    rddsp $2, 1
     31 ; DSP-NEXT:    ext $3, $2, 20, 1
     32 ; DSP-NEXT:    ins $3, $2, 6, 1
     33 ; DSP-NEXT:    ins $3, $zero, 20, 1
     34 ; DSP-NEXT:    lw $2, 20($sp)
     35 ; DSP-NEXT:    wrdsp $3, 1
     36 ; DSP-NEXT:    addwc $3, $2, $5
     37 ; DSP-NEXT:    rddsp $2, 1
     38 ; DSP-NEXT:    ext $5, $2, 20, 1
     39 ; DSP-NEXT:    lw $7, 16($sp)
     40 ; DSP-NEXT:    ins $5, $2, 6, 1
     41 ; DSP-NEXT:    ins $5, $zero, 20, 1
     42 ; DSP-NEXT:    wrdsp $5, 1
     43 ; DSP-NEXT:    addwc $2, $7, $4
     44 ; DSP-NEXT:    move $4, $6
     45 ; DSP-NEXT:    jr $ra
     46 ; DSP-NEXT:    move $5, $1
     47 ;
     48 ; MMDSP-LABEL: m:
     49 ; MMDSP:       # %bb.0: # %entry
     50 ; MMDSP-NEXT:    lw $1, 28($sp)
     51 ; MMDSP-NEXT:    lw $2, 24($sp)
     52 ; MMDSP-NEXT:    addsc $1, $1, $7
     53 ; MMDSP-NEXT:    addwc $6, $2, $6
     54 ; MMDSP-NEXT:    rddsp $2, 1
     55 ; MMDSP-NEXT:    ext $3, $2, 20, 1
     56 ; MMDSP-NEXT:    ins $3, $2, 6, 1
     57 ; MMDSP-NEXT:    ins $3, $zero, 20, 1
     58 ; MMDSP-NEXT:    lw $2, 20($sp)
     59 ; MMDSP-NEXT:    wrdsp $3, 1
     60 ; MMDSP-NEXT:    addwc $3, $2, $5
     61 ; MMDSP-NEXT:    rddsp $2, 1
     62 ; MMDSP-NEXT:    ext $5, $2, 20, 1
     63 ; MMDSP-NEXT:    lw $7, 16($sp)
     64 ; MMDSP-NEXT:    ins $5, $2, 6, 1
     65 ; MMDSP-NEXT:    ins $5, $zero, 20, 1
     66 ; MMDSP-NEXT:    wrdsp $5, 1
     67 ; MMDSP-NEXT:    addwc $2, $7, $4
     68 ; MMDSP-NEXT:    move $4, $6
     69 ; MMDSP-NEXT:    move $5, $1
     70 ; MMDSP-NEXT:    jrc $ra
     71 entry:
     72   %add = add i128 %b, %a
     73   ret i128 %add
     74 }
     75