1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2 # RUN: llc -mtriple=mips-mti-linux-gnu %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS 3 # RUN: llc -mtriple=mips-mti-linux-gnu %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC 4 # Test the long branch expansion of various branches 5 6 --- | 7 8 define i32 @a(double %a, double %b) { 9 entry: 10 %cmp = fcmp une double %a, %b 11 br i1 %cmp, label %if.then, label %return 12 13 if.then: 14 call void asm sideeffect ".space 310680", "~{$1}"() 15 ret i32 0 16 17 return: 18 ret i32 1 19 } 20 21 define i32 @b(double %a, double %b) { 22 entry: 23 %cmp = fcmp une double %a, %b 24 br i1 %cmp, label %if.then, label %return 25 26 if.then: 27 call void asm sideeffect ".space 310680", "~{$1}"() 28 ret i32 0 29 30 return: 31 ret i32 1 32 } 33 34 ... 35 --- 36 name: a 37 alignment: 2 38 exposesReturnsTwice: false 39 legalized: false 40 regBankSelected: false 41 selected: false 42 failedISel: false 43 tracksRegLiveness: true 44 registers: 45 liveins: 46 - { reg: '$d6', virtual-reg: '' } 47 - { reg: '$d7', virtual-reg: '' } 48 frameInfo: 49 isFrameAddressTaken: false 50 isReturnAddressTaken: false 51 hasStackMap: false 52 hasPatchPoint: false 53 stackSize: 0 54 offsetAdjustment: 0 55 maxAlignment: 1 56 adjustsStack: false 57 hasCalls: false 58 stackProtector: '' 59 maxCallFrameSize: 0 60 hasOpaqueSPAdjustment: false 61 hasVAStart: false 62 hasMustTailInVarArgFunc: false 63 localFrameSize: 0 64 savePoint: '' 65 restorePoint: '' 66 fixedStack: 67 stack: 68 constants: 69 body: | 70 ; MIPS-LABEL: name: a 71 ; MIPS: bb.0.entry: 72 ; MIPS: successors: %bb.2(0x50000000), %bb.1(0x30000000) 73 ; MIPS: FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0 74 ; MIPS: BC1F $fcc0, %bb.2, implicit-def $at { 75 ; MIPS: NOP 76 ; MIPS: } 77 ; MIPS: bb.1.entry: 78 ; MIPS: successors: %bb.3(0x80000000) 79 ; MIPS: J %bb.3, implicit-def $at { 80 ; MIPS: NOP 81 ; MIPS: } 82 ; MIPS: bb.2.if.then: 83 ; MIPS: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at 84 ; MIPS: PseudoReturn undef $ra, implicit killed $v0 { 85 ; MIPS: $v0 = ADDiu $zero, 0 86 ; MIPS: } 87 ; MIPS: bb.3.return: 88 ; MIPS: PseudoReturn undef $ra, implicit killed $v0 { 89 ; MIPS: $v0 = ADDiu $zero, 1 90 ; MIPS: } 91 ; PIC-LABEL: name: a 92 ; PIC: bb.0.entry: 93 ; PIC: successors: %bb.3(0x50000000), %bb.1(0x30000000) 94 ; PIC: FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0 95 ; PIC: BC1F $fcc0, %bb.3, implicit-def $at { 96 ; PIC: NOP 97 ; PIC: } 98 ; PIC: bb.1.entry: 99 ; PIC: successors: %bb.2(0x80000000) 100 ; PIC: $sp = ADDiu $sp, -8 101 ; PIC: SW $ra, $sp, 0 102 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2 103 ; PIC: BAL_BR %bb.2, implicit-def $ra { 104 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2 105 ; PIC: } 106 ; PIC: bb.2.entry: 107 ; PIC: successors: %bb.4(0x80000000) 108 ; PIC: $at = ADDu $ra, $at 109 ; PIC: $ra = LW $sp, 0 110 ; PIC: JR $at { 111 ; PIC: $sp = ADDiu $sp, 8 112 ; PIC: } 113 ; PIC: bb.3.if.then: 114 ; PIC: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at 115 ; PIC: PseudoReturn undef $ra, implicit killed $v0 { 116 ; PIC: $v0 = ADDiu $zero, 0 117 ; PIC: } 118 ; PIC: bb.4.return: 119 ; PIC: PseudoReturn undef $ra, implicit killed $v0 { 120 ; PIC: $v0 = ADDiu $zero, 1 121 ; PIC: } 122 bb.0.entry: 123 successors: %bb.1(0x50000000), %bb.2(0x30000000) 124 liveins: $d6, $d7 125 126 FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0 127 BC1T killed $fcc0, %bb.2, implicit-def $at 128 129 bb.1.if.then: 130 INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at 131 $v0 = ADDiu $zero, 0 132 PseudoReturn undef $ra, implicit killed $v0 133 134 bb.2.return: 135 $v0 = ADDiu $zero, 1 136 PseudoReturn undef $ra, implicit killed $v0 137 138 ... 139 --- 140 name: b 141 alignment: 2 142 exposesReturnsTwice: false 143 legalized: false 144 regBankSelected: false 145 selected: false 146 failedISel: false 147 tracksRegLiveness: true 148 registers: 149 liveins: 150 - { reg: '$d6', virtual-reg: '' } 151 - { reg: '$d7', virtual-reg: '' } 152 frameInfo: 153 isFrameAddressTaken: false 154 isReturnAddressTaken: false 155 hasStackMap: false 156 hasPatchPoint: false 157 stackSize: 0 158 offsetAdjustment: 0 159 maxAlignment: 1 160 adjustsStack: false 161 hasCalls: false 162 stackProtector: '' 163 maxCallFrameSize: 0 164 hasOpaqueSPAdjustment: false 165 hasVAStart: false 166 hasMustTailInVarArgFunc: false 167 localFrameSize: 0 168 savePoint: '' 169 restorePoint: '' 170 fixedStack: 171 stack: 172 constants: 173 body: | 174 ; MIPS-LABEL: name: b 175 ; MIPS: bb.0.entry: 176 ; MIPS: successors: %bb.2(0x50000000), %bb.1(0x30000000) 177 ; MIPS: FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0 178 ; MIPS: BC1T $fcc0, %bb.2, implicit-def $at { 179 ; MIPS: NOP 180 ; MIPS: } 181 ; MIPS: bb.1.entry: 182 ; MIPS: successors: %bb.3(0x80000000) 183 ; MIPS: J %bb.3, implicit-def $at { 184 ; MIPS: NOP 185 ; MIPS: } 186 ; MIPS: bb.2.if.then: 187 ; MIPS: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at 188 ; MIPS: PseudoReturn undef $ra, implicit killed $v0 { 189 ; MIPS: $v0 = ADDiu $zero, 0 190 ; MIPS: } 191 ; MIPS: bb.3.return: 192 ; MIPS: PseudoReturn undef $ra, implicit killed $v0 { 193 ; MIPS: $v0 = ADDiu $zero, 1 194 ; MIPS: } 195 ; PIC-LABEL: name: b 196 ; PIC: bb.0.entry: 197 ; PIC: successors: %bb.3(0x50000000), %bb.1(0x30000000) 198 ; PIC: FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0 199 ; PIC: BC1T $fcc0, %bb.3, implicit-def $at { 200 ; PIC: NOP 201 ; PIC: } 202 ; PIC: bb.1.entry: 203 ; PIC: successors: %bb.2(0x80000000) 204 ; PIC: $sp = ADDiu $sp, -8 205 ; PIC: SW $ra, $sp, 0 206 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2 207 ; PIC: BAL_BR %bb.2, implicit-def $ra { 208 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2 209 ; PIC: } 210 ; PIC: bb.2.entry: 211 ; PIC: successors: %bb.4(0x80000000) 212 ; PIC: $at = ADDu $ra, $at 213 ; PIC: $ra = LW $sp, 0 214 ; PIC: JR $at { 215 ; PIC: $sp = ADDiu $sp, 8 216 ; PIC: } 217 ; PIC: bb.3.if.then: 218 ; PIC: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at 219 ; PIC: PseudoReturn undef $ra, implicit killed $v0 { 220 ; PIC: $v0 = ADDiu $zero, 0 221 ; PIC: } 222 ; PIC: bb.4.return: 223 ; PIC: PseudoReturn undef $ra, implicit killed $v0 { 224 ; PIC: $v0 = ADDiu $zero, 1 225 ; PIC: } 226 bb.0.entry: 227 successors: %bb.1(0x50000000), %bb.2(0x30000000) 228 liveins: $d6, $d7 229 230 FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0 231 BC1F killed $fcc0, %bb.2, implicit-def $at 232 233 bb.1.if.then: 234 INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at 235 $v0 = ADDiu $zero, 0 236 PseudoReturn undef $ra, implicit killed $v0 237 238 bb.2.return: 239 $v0 = ADDiu $zero, 1 240 PseudoReturn undef $ra, implicit killed $v0 241 242 ... 243
