1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2 # RUN: llc -mtriple=mips64-mti-linux-gnu %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS64 3 # RUN: llc -mtriple=mips64-mti-linux-gnu %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC 4 5 # Test the long branch expansion of various branches 6 7 --- | 8 define i64 @expand_BEQ64(i64 %a, i64 %b) { 9 %cmp = icmp eq i64 %a, %b 10 br i1 %cmp, label %iftrue, label %tail 11 12 iftrue: 13 call void asm sideeffect ".space 131068", ""() 14 ret i64 1 15 16 tail: 17 ret i64 0 18 } 19 20 define i64 @expand_BNE64(i64 %a, i64 %b) { 21 %cmp = icmp eq i64 %a, %b 22 br i1 %cmp, label %iftrue, label %tail 23 24 iftrue: 25 call void asm sideeffect ".space 131068", ""() 26 ret i64 1 27 28 tail: 29 ret i64 0 30 } 31 32 define i64 @expand_BGEZ64(i64 %a, i64 %b) { 33 %cmp = icmp eq i64 %a, %b 34 br i1 %cmp, label %iftrue, label %tail 35 36 iftrue: 37 call void asm sideeffect ".space 131068", ""() 38 ret i64 1 39 40 tail: 41 ret i64 0 42 } 43 44 define i64 @expand_BGTZ64(i64 %a, i64 %b) { 45 %cmp = icmp eq i64 %a, %b 46 br i1 %cmp, label %iftrue, label %tail 47 48 iftrue: 49 call void asm sideeffect ".space 131068", ""() 50 ret i64 1 51 52 tail: 53 ret i64 0 54 } 55 56 define i64 @expand_BLEZ64(i64 %a, i64 %b) { 57 %cmp = icmp eq i64 %a, %b 58 br i1 %cmp, label %iftrue, label %tail 59 60 iftrue: 61 call void asm sideeffect ".space 131068", ""() 62 ret i64 1 63 64 tail: 65 ret i64 0 66 } 67 68 define i64 @expand_BLTZ64(i64 %a, i64 %b) { 69 %cmp = icmp eq i64 %a, %b 70 br i1 %cmp, label %iftrue, label %tail 71 72 iftrue: 73 call void asm sideeffect ".space 131068", ""() 74 ret i64 1 75 76 tail: 77 ret i64 0 78 } 79 80 ... 81 --- 82 83 name: expand_BEQ64 84 alignment: 3 85 exposesReturnsTwice: false 86 legalized: false 87 regBankSelected: false 88 selected: false 89 failedISel: false 90 tracksRegLiveness: true 91 registers: 92 liveins: 93 - { reg: '$a0_64', virtual-reg: '' } 94 frameInfo: 95 isFrameAddressTaken: false 96 isReturnAddressTaken: false 97 hasStackMap: false 98 hasPatchPoint: false 99 stackSize: 0 100 offsetAdjustment: 0 101 maxAlignment: 1 102 adjustsStack: false 103 hasCalls: false 104 stackProtector: '' 105 maxCallFrameSize: 0 106 hasOpaqueSPAdjustment: false 107 hasVAStart: false 108 hasMustTailInVarArgFunc: false 109 localFrameSize: 0 110 savePoint: '' 111 restorePoint: '' 112 fixedStack: 113 stack: 114 constants: 115 body: | 116 ; MIPS64-LABEL: name: expand_BEQ64 117 ; MIPS64: bb.0 (%ir-block.0): 118 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000) 119 ; MIPS64: BNE64 $a0_64, $zero_64, %bb.2, implicit-def $at { 120 ; MIPS64: NOP 121 ; MIPS64: } 122 ; MIPS64: bb.1 (%ir-block.0): 123 ; MIPS64: successors: %bb.3(0x80000000) 124 ; MIPS64: J %bb.3, implicit-def $at { 125 ; MIPS64: NOP 126 ; MIPS64: } 127 ; MIPS64: bb.2.iftrue: 128 ; MIPS64: INLINEASM &".space 131068", 1 129 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 130 ; MIPS64: $v0_64 = DADDiu $zero_64, 1 131 ; MIPS64: } 132 ; MIPS64: bb.3.tail: 133 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 134 ; MIPS64: $v0_64 = DADDiu $zero_64, 0 135 ; MIPS64: } 136 ; PIC-LABEL: name: expand_BEQ64 137 ; PIC: bb.0 (%ir-block.0): 138 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000) 139 ; PIC: BNE64 $a0_64, $zero_64, %bb.3, implicit-def $at { 140 ; PIC: NOP 141 ; PIC: } 142 ; PIC: bb.1 (%ir-block.0): 143 ; PIC: successors: %bb.2(0x80000000) 144 ; PIC: $sp_64 = DADDiu $sp_64, -16 145 ; PIC: SD $ra_64, $sp_64, 0 146 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2 147 ; PIC: $at_64 = DSLL $at_64, 16 148 ; PIC: BAL_BR %bb.2, implicit-def $ra { 149 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2 150 ; PIC: } 151 ; PIC: bb.2 (%ir-block.0): 152 ; PIC: successors: %bb.4(0x80000000) 153 ; PIC: $at_64 = DADDu $ra_64, $at_64 154 ; PIC: $ra_64 = LD $sp_64, 0 155 ; PIC: JR64 $at_64 { 156 ; PIC: $sp_64 = DADDiu $sp_64, 16 157 ; PIC: } 158 ; PIC: bb.3.iftrue: 159 ; PIC: INLINEASM &".space 131068", 1 160 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 161 ; PIC: $v0_64 = DADDiu $zero_64, 1 162 ; PIC: } 163 ; PIC: bb.4.tail: 164 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 165 ; PIC: $v0_64 = DADDiu $zero_64, 0 166 ; PIC: } 167 bb.0 (%ir-block.0): 168 successors: %bb.1(0x40000000), %bb.2(0x40000000) 169 liveins: $a0_64 170 171 BEQ64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at 172 173 bb.1.iftrue: 174 INLINEASM &".space 131068", 1 175 $v0_64 = DADDiu $zero_64, 1 176 PseudoReturn64 undef $ra_64, implicit killed $v0_64 177 178 bb.2.tail: 179 $v0_64 = DADDiu $zero_64, 0 180 PseudoReturn64 undef $ra_64, implicit killed $v0_64 181 182 ... 183 --- 184 185 name: expand_BNE64 186 alignment: 3 187 exposesReturnsTwice: false 188 legalized: false 189 regBankSelected: false 190 selected: false 191 failedISel: false 192 tracksRegLiveness: true 193 registers: 194 liveins: 195 - { reg: '$a0_64', virtual-reg: '' } 196 frameInfo: 197 isFrameAddressTaken: false 198 isReturnAddressTaken: false 199 hasStackMap: false 200 hasPatchPoint: false 201 stackSize: 0 202 offsetAdjustment: 0 203 maxAlignment: 1 204 adjustsStack: false 205 hasCalls: false 206 stackProtector: '' 207 maxCallFrameSize: 0 208 hasOpaqueSPAdjustment: false 209 hasVAStart: false 210 hasMustTailInVarArgFunc: false 211 localFrameSize: 0 212 savePoint: '' 213 restorePoint: '' 214 fixedStack: 215 stack: 216 constants: 217 body: | 218 ; MIPS64-LABEL: name: expand_BNE64 219 ; MIPS64: bb.0 (%ir-block.0): 220 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000) 221 ; MIPS64: BEQ64 $a0_64, $zero_64, %bb.2, implicit-def $at { 222 ; MIPS64: NOP 223 ; MIPS64: } 224 ; MIPS64: bb.1 (%ir-block.0): 225 ; MIPS64: successors: %bb.3(0x80000000) 226 ; MIPS64: J %bb.3, implicit-def $at { 227 ; MIPS64: NOP 228 ; MIPS64: } 229 ; MIPS64: bb.2.iftrue: 230 ; MIPS64: INLINEASM &".space 131068", 1 231 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 232 ; MIPS64: $v0_64 = DADDiu $zero_64, 1 233 ; MIPS64: } 234 ; MIPS64: bb.3.tail: 235 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 236 ; MIPS64: $v0_64 = DADDiu $zero_64, 0 237 ; MIPS64: } 238 ; PIC-LABEL: name: expand_BNE64 239 ; PIC: bb.0 (%ir-block.0): 240 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000) 241 ; PIC: BEQ64 $a0_64, $zero_64, %bb.3, implicit-def $at { 242 ; PIC: NOP 243 ; PIC: } 244 ; PIC: bb.1 (%ir-block.0): 245 ; PIC: successors: %bb.2(0x80000000) 246 ; PIC: $sp_64 = DADDiu $sp_64, -16 247 ; PIC: SD $ra_64, $sp_64, 0 248 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2 249 ; PIC: $at_64 = DSLL $at_64, 16 250 ; PIC: BAL_BR %bb.2, implicit-def $ra { 251 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2 252 ; PIC: } 253 ; PIC: bb.2 (%ir-block.0): 254 ; PIC: successors: %bb.4(0x80000000) 255 ; PIC: $at_64 = DADDu $ra_64, $at_64 256 ; PIC: $ra_64 = LD $sp_64, 0 257 ; PIC: JR64 $at_64 { 258 ; PIC: $sp_64 = DADDiu $sp_64, 16 259 ; PIC: } 260 ; PIC: bb.3.iftrue: 261 ; PIC: INLINEASM &".space 131068", 1 262 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 263 ; PIC: $v0_64 = DADDiu $zero_64, 1 264 ; PIC: } 265 ; PIC: bb.4.tail: 266 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 267 ; PIC: $v0_64 = DADDiu $zero_64, 0 268 ; PIC: } 269 bb.0 (%ir-block.0): 270 successors: %bb.1(0x40000000), %bb.2(0x40000000) 271 liveins: $a0_64 272 273 BNE64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at 274 275 bb.1.iftrue: 276 INLINEASM &".space 131068", 1 277 $v0_64 = DADDiu $zero_64, 1 278 PseudoReturn64 undef $ra_64, implicit killed $v0_64 279 280 bb.2.tail: 281 $v0_64 = DADDiu $zero_64, 0 282 PseudoReturn64 undef $ra_64, implicit killed $v0_64 283 284 ... 285 --- 286 287 name: expand_BGEZ64 288 alignment: 3 289 exposesReturnsTwice: false 290 legalized: false 291 regBankSelected: false 292 selected: false 293 failedISel: false 294 tracksRegLiveness: true 295 registers: 296 liveins: 297 - { reg: '$a0_64', virtual-reg: '' } 298 frameInfo: 299 isFrameAddressTaken: false 300 isReturnAddressTaken: false 301 hasStackMap: false 302 hasPatchPoint: false 303 stackSize: 0 304 offsetAdjustment: 0 305 maxAlignment: 1 306 adjustsStack: false 307 hasCalls: false 308 stackProtector: '' 309 maxCallFrameSize: 0 310 hasOpaqueSPAdjustment: false 311 hasVAStart: false 312 hasMustTailInVarArgFunc: false 313 localFrameSize: 0 314 savePoint: '' 315 restorePoint: '' 316 fixedStack: 317 stack: 318 constants: 319 body: | 320 ; MIPS64-LABEL: name: expand_BGEZ64 321 ; MIPS64: bb.0 (%ir-block.0): 322 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000) 323 ; MIPS64: BLTZ64 $a0_64, %bb.2, implicit-def $at { 324 ; MIPS64: NOP 325 ; MIPS64: } 326 ; MIPS64: bb.1 (%ir-block.0): 327 ; MIPS64: successors: %bb.3(0x80000000) 328 ; MIPS64: J %bb.3, implicit-def $at { 329 ; MIPS64: NOP 330 ; MIPS64: } 331 ; MIPS64: bb.2.iftrue: 332 ; MIPS64: INLINEASM &".space 131068", 1 333 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 334 ; MIPS64: $v0_64 = DADDiu $zero_64, 1 335 ; MIPS64: } 336 ; MIPS64: bb.3.tail: 337 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 338 ; MIPS64: $v0_64 = DADDiu $zero_64, 0 339 ; MIPS64: } 340 ; PIC-LABEL: name: expand_BGEZ64 341 ; PIC: bb.0 (%ir-block.0): 342 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000) 343 ; PIC: BLTZ64 $a0_64, %bb.3, implicit-def $at { 344 ; PIC: NOP 345 ; PIC: } 346 ; PIC: bb.1 (%ir-block.0): 347 ; PIC: successors: %bb.2(0x80000000) 348 ; PIC: $sp_64 = DADDiu $sp_64, -16 349 ; PIC: SD $ra_64, $sp_64, 0 350 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2 351 ; PIC: $at_64 = DSLL $at_64, 16 352 ; PIC: BAL_BR %bb.2, implicit-def $ra { 353 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2 354 ; PIC: } 355 ; PIC: bb.2 (%ir-block.0): 356 ; PIC: successors: %bb.4(0x80000000) 357 ; PIC: $at_64 = DADDu $ra_64, $at_64 358 ; PIC: $ra_64 = LD $sp_64, 0 359 ; PIC: JR64 $at_64 { 360 ; PIC: $sp_64 = DADDiu $sp_64, 16 361 ; PIC: } 362 ; PIC: bb.3.iftrue: 363 ; PIC: INLINEASM &".space 131068", 1 364 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 365 ; PIC: $v0_64 = DADDiu $zero_64, 1 366 ; PIC: } 367 ; PIC: bb.4.tail: 368 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 369 ; PIC: $v0_64 = DADDiu $zero_64, 0 370 ; PIC: } 371 bb.0 (%ir-block.0): 372 successors: %bb.1(0x40000000), %bb.2(0x40000000) 373 liveins: $a0_64 374 375 BGEZ64 killed renamable $a0_64, %bb.2, implicit-def $at 376 377 bb.1.iftrue: 378 INLINEASM &".space 131068", 1 379 $v0_64 = DADDiu $zero_64, 1 380 PseudoReturn64 undef $ra_64, implicit killed $v0_64 381 382 bb.2.tail: 383 $v0_64 = DADDiu $zero_64, 0 384 PseudoReturn64 undef $ra_64, implicit killed $v0_64 385 386 ... 387 --- 388 389 name: expand_BGTZ64 390 alignment: 3 391 exposesReturnsTwice: false 392 legalized: false 393 regBankSelected: false 394 selected: false 395 failedISel: false 396 tracksRegLiveness: true 397 registers: 398 liveins: 399 - { reg: '$a0_64', virtual-reg: '' } 400 frameInfo: 401 isFrameAddressTaken: false 402 isReturnAddressTaken: false 403 hasStackMap: false 404 hasPatchPoint: false 405 stackSize: 0 406 offsetAdjustment: 0 407 maxAlignment: 1 408 adjustsStack: false 409 hasCalls: false 410 stackProtector: '' 411 maxCallFrameSize: 0 412 hasOpaqueSPAdjustment: false 413 hasVAStart: false 414 hasMustTailInVarArgFunc: false 415 localFrameSize: 0 416 savePoint: '' 417 restorePoint: '' 418 fixedStack: 419 stack: 420 constants: 421 body: | 422 ; MIPS64-LABEL: name: expand_BGTZ64 423 ; MIPS64: bb.0 (%ir-block.0): 424 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000) 425 ; MIPS64: BLEZ64 $a0_64, %bb.2, implicit-def $at { 426 ; MIPS64: NOP 427 ; MIPS64: } 428 ; MIPS64: bb.1 (%ir-block.0): 429 ; MIPS64: successors: %bb.3(0x80000000) 430 ; MIPS64: J %bb.3, implicit-def $at { 431 ; MIPS64: NOP 432 ; MIPS64: } 433 ; MIPS64: bb.2.iftrue: 434 ; MIPS64: INLINEASM &".space 131068", 1 435 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 436 ; MIPS64: $v0_64 = DADDiu $zero_64, 1 437 ; MIPS64: } 438 ; MIPS64: bb.3.tail: 439 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 440 ; MIPS64: $v0_64 = DADDiu $zero_64, 0 441 ; MIPS64: } 442 ; PIC-LABEL: name: expand_BGTZ64 443 ; PIC: bb.0 (%ir-block.0): 444 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000) 445 ; PIC: BLEZ64 $a0_64, %bb.3, implicit-def $at { 446 ; PIC: NOP 447 ; PIC: } 448 ; PIC: bb.1 (%ir-block.0): 449 ; PIC: successors: %bb.2(0x80000000) 450 ; PIC: $sp_64 = DADDiu $sp_64, -16 451 ; PIC: SD $ra_64, $sp_64, 0 452 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2 453 ; PIC: $at_64 = DSLL $at_64, 16 454 ; PIC: BAL_BR %bb.2, implicit-def $ra { 455 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2 456 ; PIC: } 457 ; PIC: bb.2 (%ir-block.0): 458 ; PIC: successors: %bb.4(0x80000000) 459 ; PIC: $at_64 = DADDu $ra_64, $at_64 460 ; PIC: $ra_64 = LD $sp_64, 0 461 ; PIC: JR64 $at_64 { 462 ; PIC: $sp_64 = DADDiu $sp_64, 16 463 ; PIC: } 464 ; PIC: bb.3.iftrue: 465 ; PIC: INLINEASM &".space 131068", 1 466 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 467 ; PIC: $v0_64 = DADDiu $zero_64, 1 468 ; PIC: } 469 ; PIC: bb.4.tail: 470 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 471 ; PIC: $v0_64 = DADDiu $zero_64, 0 472 ; PIC: } 473 bb.0 (%ir-block.0): 474 successors: %bb.1(0x40000000), %bb.2(0x40000000) 475 liveins: $a0_64 476 477 BGTZ64 killed renamable $a0_64, %bb.2, implicit-def $at 478 479 bb.1.iftrue: 480 INLINEASM &".space 131068", 1 481 $v0_64 = DADDiu $zero_64, 1 482 PseudoReturn64 undef $ra_64, implicit killed $v0_64 483 484 bb.2.tail: 485 $v0_64 = DADDiu $zero_64, 0 486 PseudoReturn64 undef $ra_64, implicit killed $v0_64 487 488 ... 489 --- 490 491 name: expand_BLEZ64 492 alignment: 3 493 exposesReturnsTwice: false 494 legalized: false 495 regBankSelected: false 496 selected: false 497 failedISel: false 498 tracksRegLiveness: true 499 registers: 500 liveins: 501 - { reg: '$a0_64', virtual-reg: '' } 502 frameInfo: 503 isFrameAddressTaken: false 504 isReturnAddressTaken: false 505 hasStackMap: false 506 hasPatchPoint: false 507 stackSize: 0 508 offsetAdjustment: 0 509 maxAlignment: 1 510 adjustsStack: false 511 hasCalls: false 512 stackProtector: '' 513 maxCallFrameSize: 0 514 hasOpaqueSPAdjustment: false 515 hasVAStart: false 516 hasMustTailInVarArgFunc: false 517 localFrameSize: 0 518 savePoint: '' 519 restorePoint: '' 520 fixedStack: 521 stack: 522 constants: 523 body: | 524 ; MIPS64-LABEL: name: expand_BLEZ64 525 ; MIPS64: bb.0 (%ir-block.0): 526 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000) 527 ; MIPS64: BGTZ64 $a0_64, %bb.2, implicit-def $at { 528 ; MIPS64: NOP 529 ; MIPS64: } 530 ; MIPS64: bb.1 (%ir-block.0): 531 ; MIPS64: successors: %bb.3(0x80000000) 532 ; MIPS64: J %bb.3, implicit-def $at { 533 ; MIPS64: NOP 534 ; MIPS64: } 535 ; MIPS64: bb.2.iftrue: 536 ; MIPS64: INLINEASM &".space 131068", 1 537 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 538 ; MIPS64: $v0_64 = DADDiu $zero_64, 1 539 ; MIPS64: } 540 ; MIPS64: bb.3.tail: 541 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 542 ; MIPS64: $v0_64 = DADDiu $zero_64, 0 543 ; MIPS64: } 544 ; PIC-LABEL: name: expand_BLEZ64 545 ; PIC: bb.0 (%ir-block.0): 546 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000) 547 ; PIC: BGTZ64 $a0_64, %bb.3, implicit-def $at { 548 ; PIC: NOP 549 ; PIC: } 550 ; PIC: bb.1 (%ir-block.0): 551 ; PIC: successors: %bb.2(0x80000000) 552 ; PIC: $sp_64 = DADDiu $sp_64, -16 553 ; PIC: SD $ra_64, $sp_64, 0 554 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2 555 ; PIC: $at_64 = DSLL $at_64, 16 556 ; PIC: BAL_BR %bb.2, implicit-def $ra { 557 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2 558 ; PIC: } 559 ; PIC: bb.2 (%ir-block.0): 560 ; PIC: successors: %bb.4(0x80000000) 561 ; PIC: $at_64 = DADDu $ra_64, $at_64 562 ; PIC: $ra_64 = LD $sp_64, 0 563 ; PIC: JR64 $at_64 { 564 ; PIC: $sp_64 = DADDiu $sp_64, 16 565 ; PIC: } 566 ; PIC: bb.3.iftrue: 567 ; PIC: INLINEASM &".space 131068", 1 568 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 569 ; PIC: $v0_64 = DADDiu $zero_64, 1 570 ; PIC: } 571 ; PIC: bb.4.tail: 572 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 573 ; PIC: $v0_64 = DADDiu $zero_64, 0 574 ; PIC: } 575 bb.0 (%ir-block.0): 576 successors: %bb.1(0x40000000), %bb.2(0x40000000) 577 liveins: $a0_64 578 579 BLEZ64 killed renamable $a0_64, %bb.2, implicit-def $at 580 581 bb.1.iftrue: 582 INLINEASM &".space 131068", 1 583 $v0_64 = DADDiu $zero_64, 1 584 PseudoReturn64 undef $ra_64, implicit killed $v0_64 585 586 bb.2.tail: 587 $v0_64 = DADDiu $zero_64, 0 588 PseudoReturn64 undef $ra_64, implicit killed $v0_64 589 590 ... 591 --- 592 593 name: expand_BLTZ64 594 alignment: 3 595 exposesReturnsTwice: false 596 legalized: false 597 regBankSelected: false 598 selected: false 599 failedISel: false 600 tracksRegLiveness: true 601 registers: 602 liveins: 603 - { reg: '$a0_64', virtual-reg: '' } 604 frameInfo: 605 isFrameAddressTaken: false 606 isReturnAddressTaken: false 607 hasStackMap: false 608 hasPatchPoint: false 609 stackSize: 0 610 offsetAdjustment: 0 611 maxAlignment: 1 612 adjustsStack: false 613 hasCalls: false 614 stackProtector: '' 615 maxCallFrameSize: 0 616 hasOpaqueSPAdjustment: false 617 hasVAStart: false 618 hasMustTailInVarArgFunc: false 619 localFrameSize: 0 620 savePoint: '' 621 restorePoint: '' 622 fixedStack: 623 stack: 624 constants: 625 body: | 626 ; MIPS64-LABEL: name: expand_BLTZ64 627 ; MIPS64: bb.0 (%ir-block.0): 628 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000) 629 ; MIPS64: BGEZ64 $a0_64, %bb.2, implicit-def $at { 630 ; MIPS64: NOP 631 ; MIPS64: } 632 ; MIPS64: bb.1 (%ir-block.0): 633 ; MIPS64: successors: %bb.3(0x80000000) 634 ; MIPS64: J %bb.3, implicit-def $at { 635 ; MIPS64: NOP 636 ; MIPS64: } 637 ; MIPS64: bb.2.iftrue: 638 ; MIPS64: INLINEASM &".space 131068", 1 639 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 640 ; MIPS64: $v0_64 = DADDiu $zero_64, 1 641 ; MIPS64: } 642 ; MIPS64: bb.3.tail: 643 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 644 ; MIPS64: $v0_64 = DADDiu $zero_64, 0 645 ; MIPS64: } 646 ; PIC-LABEL: name: expand_BLTZ64 647 ; PIC: bb.0 (%ir-block.0): 648 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000) 649 ; PIC: BGEZ64 $a0_64, %bb.3, implicit-def $at { 650 ; PIC: NOP 651 ; PIC: } 652 ; PIC: bb.1 (%ir-block.0): 653 ; PIC: successors: %bb.2(0x80000000) 654 ; PIC: $sp_64 = DADDiu $sp_64, -16 655 ; PIC: SD $ra_64, $sp_64, 0 656 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2 657 ; PIC: $at_64 = DSLL $at_64, 16 658 ; PIC: BAL_BR %bb.2, implicit-def $ra { 659 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2 660 ; PIC: } 661 ; PIC: bb.2 (%ir-block.0): 662 ; PIC: successors: %bb.4(0x80000000) 663 ; PIC: $at_64 = DADDu $ra_64, $at_64 664 ; PIC: $ra_64 = LD $sp_64, 0 665 ; PIC: JR64 $at_64 { 666 ; PIC: $sp_64 = DADDiu $sp_64, 16 667 ; PIC: } 668 ; PIC: bb.3.iftrue: 669 ; PIC: INLINEASM &".space 131068", 1 670 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 671 ; PIC: $v0_64 = DADDiu $zero_64, 1 672 ; PIC: } 673 ; PIC: bb.4.tail: 674 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 { 675 ; PIC: $v0_64 = DADDiu $zero_64, 0 676 ; PIC: } 677 bb.0 (%ir-block.0): 678 successors: %bb.1(0x40000000), %bb.2(0x40000000) 679 liveins: $a0_64 680 681 BLTZ64 killed renamable $a0_64, %bb.2, implicit-def $at 682 683 bb.1.iftrue: 684 INLINEASM &".space 131068", 1 685 $v0_64 = DADDiu $zero_64, 1 686 PseudoReturn64 undef $ra_64, implicit killed $v0_64 687 688 bb.2.tail: 689 $v0_64 = DADDiu $zero_64, 0 690 PseudoReturn64 undef $ra_64, implicit killed $v0_64 691 692 ... 693
