1 ; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips \ 2 ; RUN: -relocation-model=pic < %s | \ 3 ; RUN: FileCheck %s -check-prefixes=ALL,MM32 4 ; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips \ 5 ; RUN: -relocation-model=pic < %s | \ 6 ; RUN: FileCheck %s -check-prefixes=ALL,MM32 7 8 @gf0 = external global float 9 10 define float @test_lwc1() { 11 entry: 12 ; CHECK-LABEL: test_lwc1 13 ; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp) 14 ; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp) 15 ; MM32: addu $[[R2:[0-9]+]], $[[R1]], $25 16 ; MM32: lw $[[R3:[0-9]+]], %got(gf0)($[[R2]]) 17 ; MM32: lwc1 $f0, 0($[[R3]]) 18 19 %0 = load float, float* @gf0, align 4 20 ret float %0 21 } 22 23 define void @test_swc1(float %a) { 24 entry: 25 ; CHECK-LABEL: test_swc1 26 ; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp) 27 ; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp) 28 ; MM32: addu $[[R2:[0-9]+]], $[[R1]], $25 29 ; MM32: lw $[[R3:[0-9]+]], %got(gf0)($[[R2]]) 30 ; MM32: swc1 $f12, 0($[[R3]]) 31 32 store float %a, float* @gf0, align 4 33 ret void 34 } 35 36
