1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=mips -mcpu=mips32r2 -mattr=+micromips \ 3 ; RUN: -show-mc-encoding < %s | FileCheck --check-prefix=MM2 %s 4 ; RUN: llc -mtriple=mips -mcpu=mips32r6 -mattr=+micromips \ 5 ; RUN: -show-mc-encoding < %s | FileCheck --check-prefix=MM6 %s 6 7 define double @foo(double %a, double %b) { 8 ; MM2-LABEL: foo: 9 ; MM2: # %bb.0: # %entry 10 ; MM2-NEXT: mov.d $f0, $f12 # encoding: [0x54,0x0c,0x20,0x7b] 11 ; MM2-NEXT: mtc1 $zero, $f2 # encoding: [0x54,0x02,0x28,0x3b] 12 ; MM2-NEXT: mthc1 $zero, $f2 # encoding: [0x54,0x02,0x38,0x3b] 13 ; MM2-NEXT: c.ule.d $f12, $f2 # encoding: [0x54,0x4c,0x05,0xfc] 14 ; MM2-NEXT: bc1t $BB0_2 # encoding: [0x43,0xa0,A,A] 15 ; MM2-NEXT: # fixup A - offset: 0, value: ($BB0_2), kind: fixup_MICROMIPS_PC16_S1 16 ; MM2-NEXT: nop # encoding: [0x00,0x00,0x00,0x00] 17 ; MM2-NEXT: # %bb.1: # %entry 18 ; MM2-NEXT: j $BB0_2 # encoding: [0b110101AA,A,A,A] 19 ; MM2-NEXT: # fixup A - offset: 0, value: ($BB0_2), kind: fixup_MICROMIPS_26_S1 20 ; MM2-NEXT: nop # encoding: [0x00,0x00,0x00,0x00] 21 ; MM2-NEXT: $BB0_2: # %return 22 ; MM2-NEXT: jrc $ra # encoding: [0x45,0xbf] 23 ; 24 ; MM6-LABEL: foo: 25 ; MM6: # %bb.0: # %entry 26 ; MM6-NEXT: mov.d $f0, $f12 # encoding: [0x46,0x20,0x60,0x06] 27 ; MM6-NEXT: mtc1 $zero, $f1 # encoding: [0x54,0x01,0x28,0x3b] 28 ; MM6-NEXT: mthc1 $zero, $f1 # encoding: [0x54,0x01,0x38,0x3b] 29 ; MM6-NEXT: cmp.ule.d $f1, $f12, $f1 # encoding: [0x54,0x2c,0x09,0xd5] 30 ; MM6-NEXT: mfc1 $2, $f1 # encoding: [0x54,0x41,0x20,0x3b] 31 ; MM6-NEXT: andi16 $2, $2, 1 # encoding: [0x2d,0x21] 32 ; MM6-NEXT: jrc $ra # encoding: [0x45,0xbf] 33 entry: 34 %cmp = fcmp ogt double %a, 0.000000e+00 35 br i1 %cmp, label %if.end, label %if.else 36 37 if.else: 38 br label %return 39 40 if.end: 41 %mul = fmul double %a, 2.000000e+00 42 br label %return 43 44 return: 45 ret double %a 46 } 47 48 define double @bar(double %x, double %y) { 49 ; MM2-LABEL: bar: 50 ; MM2: # %bb.0: # %entry 51 ; MM2-NEXT: mov.d $f0, $f14 # encoding: [0x54,0x0e,0x20,0x7b] 52 ; MM2-NEXT: c.olt.d $f12, $f14 # encoding: [0x55,0xcc,0x05,0x3c] 53 ; MM2-NEXT: jr $ra # encoding: [0x00,0x1f,0x0f,0x3c] 54 ; MM2-NEXT: movt.d $f0, $f12, $fcc0 # encoding: [0x54,0x0c,0x02,0x60] 55 ; 56 ; MM6-LABEL: bar: 57 ; MM6: # %bb.0: # %entry 58 ; MM6-NEXT: cmp.lt.d $f0, $f12, $f14 # encoding: [0x55,0xcc,0x01,0x15] 59 ; MM6-NEXT: mfc1 $1, $f0 # encoding: [0x54,0x20,0x20,0x3b] 60 ; MM6-NEXT: mtc1 $1, $f0 # encoding: [0x44,0x81,0x00,0x00] 61 ; MM6-NEXT: sel.d $f0, $f14, $f12 # encoding: [0x55,0x8e,0x02,0xb8] 62 ; MM6-NEXT: jrc $ra # encoding: [0x45,0xbf] 63 ; FIXME: mtc1 is encoded as a regular non-microMIPS instruction 64 entry: 65 %z = fcmp olt double %x, %y 66 %r = select i1 %z, double %x, double %y 67 ret double %r 68 } 69
