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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -O2 -mtriple mipsel--linux-android -mattr=+dsp -verify-machineinstrs | FileCheck %s
      3 
      4 ; Function below generates a v2i16 to f32 bitcast.
      5 ; Test that we are able to match it.
      6 
      7 define float @f(<8 x i16>* %a) {
      8 ; CHECK-LABEL: f:
      9 ; CHECK:       # %bb.0: # %entry
     10 ; CHECK-NEXT:    addiu $sp, $sp, -32
     11 ; CHECK-NEXT:    .cfi_def_cfa_offset 32
     12 ; CHECK-NEXT:    sw $fp, 28($sp) # 4-byte Folded Spill
     13 ; CHECK-NEXT:    .cfi_offset 30, -4
     14 ; CHECK-NEXT:    move $fp, $sp
     15 ; CHECK-NEXT:    .cfi_def_cfa_register 30
     16 ; CHECK-NEXT:    addiu $1, $zero, -16
     17 ; CHECK-NEXT:    and $sp, $sp, $1
     18 ; CHECK-NEXT:    lw $1, 8($4)
     19 ; CHECK-NEXT:    lw $2, 4($4)
     20 ; CHECK-NEXT:    lw $3, 12($4)
     21 ; CHECK-NEXT:    sw $3, 12($sp)
     22 ; CHECK-NEXT:    sw $1, 8($sp)
     23 ; CHECK-NEXT:    sw $2, 4($sp)
     24 ; CHECK-NEXT:    lw $1, 0($4)
     25 ; CHECK-NEXT:    sw $1, 0($sp)
     26 ; CHECK-NEXT:    mtc1 $1, $f0
     27 ; CHECK-NEXT:    move $sp, $fp
     28 ; CHECK-NEXT:    lw $fp, 28($sp) # 4-byte Folded Reload
     29 ; CHECK-NEXT:    jr $ra
     30 ; CHECK-NEXT:    addiu $sp, $sp, 32
     31 ; CHECK-NEXT:    .set at
     32 ; CHECK-NEXT:    .set macro
     33 ; CHECK-NEXT:    .set reorder
     34 ; CHECK-NEXT:    .end f
     35 entry:
     36   %m = alloca <8 x i16>
     37   %0 = load <8 x i16>, <8 x i16>* %a
     38   store <8 x i16> %0, <8 x i16>* %m
     39   %1 = bitcast <8 x i16> %0 to <4 x float>
     40   %2 = shufflevector <4 x float> %1, <4 x float> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
     41   %3 = shufflevector <8 x float> zeroinitializer, <8 x float> %2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
     42   %4 = bitcast <8 x float> %3 to <8 x i32>
     43   %5 = extractelement <8 x i32> %4, i32 0
     44   %6 = bitcast i32 %5 to float
     45   ret float %6
     46 }
     47 
     48