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      1 ; We run nvvm-reflect (and then optimize) this module twice, once with metadata
      2 ; that enables FTZ, and again with metadata that disables it.
      3 
      4 ; RUN: cat %s > %t.noftz
      5 ; RUN: echo '!0 = !{i32 4, !"nvvm-reflect-ftz", i32 0}' >> %t.noftz
      6 ; RUN: opt %t.noftz -S -nvvm-reflect -O2 \
      7 ; RUN:   | FileCheck %s --check-prefix=USE_FTZ_0 --check-prefix=CHECK
      8 
      9 ; RUN: cat %s > %t.ftz
     10 ; RUN: echo '!0 = !{i32 4, !"nvvm-reflect-ftz", i32 1}' >> %t.ftz
     11 ; RUN: opt %t.ftz -S -nvvm-reflect -O2 \
     12 ; RUN:   | FileCheck %s --check-prefix=USE_FTZ_1 --check-prefix=CHECK
     13 
     14 @str = private unnamed_addr addrspace(4) constant [11 x i8] c"__CUDA_FTZ\00"
     15 
     16 declare i32 @__nvvm_reflect(i8*)
     17 declare i8* @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(i8 addrspace(4)*)
     18 
     19 ; CHECK-LABEL: @foo
     20 define float @foo(float %a, float %b) {
     21 ; CHECK-NOT: call i32 @__nvvm_reflect
     22   %ptr = tail call i8* @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @str, i32 0, i32 0))
     23   %reflect = tail call i32 @__nvvm_reflect(i8* %ptr)
     24   %cmp = icmp ugt i32 %reflect, 0
     25   br i1 %cmp, label %use_mul, label %use_add
     26 
     27 use_mul:
     28 ; USE_FTZ_1: fmul float %a, %b
     29 ; USE_FTZ_0-NOT: fadd float %a, %b
     30   %ret1 = fmul float %a, %b
     31   br label %exit
     32 
     33 use_add:
     34 ; USE_FTZ_0: fadd float %a, %b
     35 ; USE_FTZ_1-NOT: fmul float %a, %b
     36   %ret2 = fadd float %a, %b
     37   br label %exit
     38 
     39 exit:
     40   %ret = phi float [%ret1, %use_mul], [%ret2, %use_add]
     41   ret float %ret
     42 }
     43 
     44 declare i32 @llvm.nvvm.reflect.p0i8(i8*)
     45 
     46 ; CHECK-LABEL: define i32 @intrinsic
     47 define i32 @intrinsic() {
     48 ; CHECK-NOT: call i32 @llvm.nvvm.reflect
     49 ; USE_FTZ_0: ret i32 0
     50 ; USE_FTZ_1: ret i32 1
     51   %ptr = tail call i8* @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @str, i32 0, i32 0))
     52   %reflect = tail call i32 @llvm.nvvm.reflect.p0i8(i8* %ptr)
     53   ret i32 %reflect
     54 }
     55 
     56 ; CUDA-7.0 passes __nvvm_reflect argument slightly differently.
     57 ; Verify that it works, too
     58 
     59 @"$str" = private addrspace(1) constant [11 x i8] c"__CUDA_FTZ\00"
     60 
     61 ; CHECK-LABEL: @bar
     62 define float @bar(float %a, float %b) {
     63 ; CHECK-NOT: call i32 @__nvvm_reflect
     64   %reflect = call i32 @__nvvm_reflect(i8* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(1)* @"$str", i32 0, i32 0) to i8*))
     65   %cmp = icmp ne i32 %reflect, 0
     66   br i1 %cmp, label %use_mul, label %use_add
     67 
     68 use_mul:
     69 ; USE_FTZ_1: fmul float %a, %b
     70 ; USE_FTZ_0-NOT: fadd float %a, %b
     71   %ret1 = fmul float %a, %b
     72   br label %exit
     73 
     74 use_add:
     75 ; USE_FTZ_0: fadd float %a, %b
     76 ; USE_FTZ_1-NOT: fmul float %a, %b
     77   %ret2 = fadd float %a, %b
     78   br label %exit
     79 
     80 exit:
     81   %ret = phi float [%ret1, %use_mul], [%ret2, %use_add]
     82   ret float %ret
     83 }
     84 
     85 !llvm.module.flags = !{!0}
     86 ; A module flag is added to the end of this file by the RUN lines at the top.
     87