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      1 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s
      2 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s \
      3 ; RUN:  --check-prefix=CHECK-P7
      4 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s
      5 
      6 define signext i32 @f32toi32(float %a) {
      7 entry:
      8   %0 = bitcast float %a to i32
      9   ret i32 %0
     10 ; CHECK-P7: stfs 1,
     11 ; CHECK-P7: lwa 3,
     12 ; CHECK: xscvdpspn [[CONVREG:[0-9]+]], 1
     13 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[CONVREG]], [[CONVREG]], 3
     14 ; CHECK: mfvsrwz 3, [[SHIFTREG]]
     15 }
     16 
     17 define i64 @f64toi64(double %a) {
     18 entry:
     19   %0 = bitcast double %a to i64
     20   ret i64 %0
     21 ; CHECK-P7: stfdx 1,
     22 ; CHECK-P7: ld 3,
     23 ; CHECK: mffprd 3, 1
     24 }
     25 
     26 define float @i32tof32(i32 signext %a) {
     27 entry:
     28   %0 = bitcast i32 %a to float
     29   ret float %0
     30 ; CHECK-P7: stw 3,
     31 ; CHECK-P7: lfs 1,
     32 ; CHECK: mtvsrd [[MOVEREG:[0-9]+]], 3
     33 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[MOVEREG]], [[MOVEREG]], 1
     34 ; CHECK: xscvspdpn 1, [[SHIFTREG]]
     35 }
     36 
     37 define double @i64tof64(i64 %a) {
     38 entry:
     39   %0 = bitcast i64 %a to double
     40   ret double %0
     41 ; CHECK-P7: std 3,
     42 ; CHECK-P7: lfdx 1,
     43 ; CHECK: mtvsrd 1, 3
     44 }
     45 
     46 define zeroext i32 @f32toi32u(float %a) {
     47 entry:
     48   %0 = bitcast float %a to i32
     49   ret i32 %0
     50 ; CHECK-P7: stfs 1,
     51 ; CHECK-P7: lwz 3,
     52 ; CHECK: xscvdpspn [[CONVREG:[0-9]+]], 1
     53 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[CONVREG]], [[CONVREG]], 3
     54 ; CHECK: mfvsrwz 3, [[SHIFTREG]]
     55 }
     56 
     57 define i64 @f64toi64u(double %a) {
     58 entry:
     59   %0 = bitcast double %a to i64
     60   ret i64 %0
     61 ; CHECK-P7: stfdx 1,
     62 ; CHECK-P7: ld 3,
     63 ; CHECK: mffprd 3, 1
     64 }
     65 
     66 define float @i32utof32(i32 zeroext %a) {
     67 entry:
     68   %0 = bitcast i32 %a to float
     69   ret float %0
     70 ; CHECK-P7: stw 3,
     71 ; CHECK-P7: lfs 1,
     72 ; CHECK: mtvsrd [[MOVEREG:[0-9]+]], 3
     73 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[MOVEREG]], [[MOVEREG]], 1
     74 ; CHECK: xscvspdpn 1, [[SHIFTREG]]
     75 }
     76 
     77 define double @i64utof64(i64 %a) {
     78 entry:
     79   %0 = bitcast i64 %a to double
     80   ret double %0
     81 ; CHECK-P7: std 3,
     82 ; CHECK-P7: lfdx 1,
     83 ; CHECK: mtvsrd 1, 3
     84 }
     85