1 ; RUN: llc -verify-machineinstrs < %s | FileCheck %s 2 3 target datalayout = "E-p:32:32" 4 target triple = "powerpc-apple-darwin8.7.0" 5 6 ;CHECK-LABEL: foo: 7 ; There are 4 inner loops (%bb, %bb12, %bb25, %bb38) that all exit to %cond_next48 8 ; The last (whichever it is) should have a fallthrough exit, and the other three 9 ; need an unconditional branch. No other block should have an unconditional 10 ; branch to cond_next48 11 ; One of the blocks ends up with a loop exit block that gets a tail-duplicated copy 12 ; of %cond_next48, so there should only be two unconditional branches. 13 14 ;CHECK: b LBB0_13 15 ;CHECK: b LBB0_13 16 ;CHECK-NOT: b LBB0_13 17 ;CHECK: LBB0_13: ; %cond_next48 18 19 define void @foo(i32 %W, i32 %X, i32 %Y, i32 %Z) { 20 entry: 21 %tmp1 = and i32 %W, 1 ; <i32> [#uses=1] 22 %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] 23 br i1 %tmp1.upgrd.1, label %cond_false, label %bb5 24 bb: ; preds = %bb5, %bb 25 %indvar77 = phi i32 [ %indvar.next78, %bb ], [ 0, %bb5 ] ; <i32> [#uses=1] 26 %tmp2 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 27 %indvar.next78 = add i32 %indvar77, 1 ; <i32> [#uses=2] 28 %exitcond79 = icmp eq i32 %indvar.next78, %X ; <i1> [#uses=1] 29 br i1 %exitcond79, label %cond_next48, label %bb 30 bb5: ; preds = %entry 31 %tmp = icmp eq i32 %X, 0 ; <i1> [#uses=1] 32 br i1 %tmp, label %cond_next48, label %bb 33 cond_false: ; preds = %entry 34 %tmp10 = and i32 %W, 2 ; <i32> [#uses=1] 35 %tmp10.upgrd.2 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1] 36 br i1 %tmp10.upgrd.2, label %cond_false20, label %bb16 37 bb12: ; preds = %bb16, %bb12 38 %indvar72 = phi i32 [ %indvar.next73, %bb12 ], [ 0, %bb16 ] ; <i32> [#uses=1] 39 %tmp13 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 40 %indvar.next73 = add i32 %indvar72, 1 ; <i32> [#uses=2] 41 %exitcond74 = icmp eq i32 %indvar.next73, %Y ; <i1> [#uses=1] 42 br i1 %exitcond74, label %cond_next48, label %bb12 43 bb16: ; preds = %cond_false 44 %tmp18 = icmp eq i32 %Y, 0 ; <i1> [#uses=1] 45 br i1 %tmp18, label %cond_next48, label %bb12 46 cond_false20: ; preds = %cond_false 47 %tmp23 = and i32 %W, 4 ; <i32> [#uses=1] 48 %tmp23.upgrd.3 = icmp eq i32 %tmp23, 0 ; <i1> [#uses=1] 49 br i1 %tmp23.upgrd.3, label %cond_false33, label %bb29 50 bb25: ; preds = %bb29, %bb25 51 %indvar67 = phi i32 [ %indvar.next68, %bb25 ], [ 0, %bb29 ] ; <i32> [#uses=1] 52 %tmp26 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 53 %indvar.next68 = add i32 %indvar67, 1 ; <i32> [#uses=2] 54 %exitcond69 = icmp eq i32 %indvar.next68, %Z ; <i1> [#uses=1] 55 br i1 %exitcond69, label %cond_next48, label %bb25 56 bb29: ; preds = %cond_false20 57 %tmp31 = icmp eq i32 %Z, 0 ; <i1> [#uses=1] 58 br i1 %tmp31, label %cond_next48, label %bb25 59 cond_false33: ; preds = %cond_false20 60 %tmp36 = and i32 %W, 8 ; <i32> [#uses=1] 61 %tmp36.upgrd.4 = icmp eq i32 %tmp36, 0 ; <i1> [#uses=1] 62 br i1 %tmp36.upgrd.4, label %cond_next48, label %bb42 63 bb38: ; preds = %bb42 64 %tmp39 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 65 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] 66 br label %bb42 67 bb42: ; preds = %bb38, %cond_false33 68 %indvar = phi i32 [ %indvar.next, %bb38 ], [ 0, %cond_false33 ] ; <i32> [#uses=4] 69 %W_addr.0 = sub i32 %W, %indvar ; <i32> [#uses=1] 70 %exitcond = icmp eq i32 %indvar, %W ; <i1> [#uses=1] 71 br i1 %exitcond, label %cond_next48, label %bb38 72 cond_next48: ; preds = %bb42, %cond_false33, %bb29, %bb25, %bb16, %bb12, %bb5, %bb 73 %W_addr.1 = phi i32 [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ] ; <i32> [#uses=1] 74 %tmp50 = icmp eq i32 %W_addr.1, 0 ; <i1> [#uses=1] 75 br i1 %tmp50, label %UnifiedReturnBlock, label %cond_true51 76 cond_true51: ; preds = %cond_next48 77 %tmp52 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] 78 ret void 79 UnifiedReturnBlock: ; preds = %cond_next48 80 ret void 81 } 82 83 declare i32 @bar(...) 84
