1 # RUN: llc -start-after ppc-mi-peepholes -ppc-late-peephole %s -o - | FileCheck %s 2 --- | 3 ; ModuleID = 'a.ll' 4 source_filename = "a.c" 5 target datalayout = "e-m:e-i64:64-n32:64" 6 target triple = "powerpc64le-unknown-linux-gnu" 7 8 ; Function Attrs: norecurse nounwind readnone 9 define signext i32 @unsafeAddR0R3(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 10 entry: 11 %add = add nsw i32 %b, %a 12 ret i32 %add 13 } 14 15 ; Function Attrs: norecurse nounwind readnone 16 define signext i32 @unsafeAddR3R0(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 17 entry: 18 %add = add nsw i32 %b, %a 19 ret i32 %add 20 } 21 22 ; Function Attrs: norecurse nounwind readnone 23 define signext i32 @safeAddR0R3(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 24 entry: 25 %add = add nsw i32 %b, %a 26 ret i32 %add 27 } 28 29 ; Function Attrs: norecurse nounwind readnone 30 define signext i32 @safeAddR3R0(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 31 entry: 32 %add = add nsw i32 %b, %a 33 ret i32 %add 34 } 35 36 ; Function Attrs: norecurse nounwind readonly 37 define i64 @unsafeLDXR3R0(i64* nocapture readonly %ptr, i64 %off) local_unnamed_addr #1 { 38 entry: 39 %0 = bitcast i64* %ptr to i8* 40 %add.ptr = getelementptr inbounds i8, i8* %0, i64 %off 41 %1 = bitcast i8* %add.ptr to i64* 42 %2 = load i64, i64* %1, align 8, !tbaa !3 43 ret i64 %2 44 } 45 46 ; Function Attrs: norecurse nounwind readonly 47 define i64 @safeLDXZeroR3(i64* nocapture readonly %ptr, i64 %off) local_unnamed_addr #1 { 48 entry: 49 %0 = bitcast i64* %ptr to i8* 50 %add.ptr = getelementptr inbounds i8, i8* %0, i64 %off 51 %1 = bitcast i8* %add.ptr to i64* 52 %2 = load i64, i64* %1, align 8, !tbaa !3 53 ret i64 %2 54 } 55 56 ; Function Attrs: norecurse nounwind readonly 57 define i64 @safeLDXR3R0(i64* nocapture readonly %ptr, i64 %off) local_unnamed_addr #1 { 58 entry: 59 %0 = bitcast i64* %ptr to i8* 60 %add.ptr = getelementptr inbounds i8, i8* %0, i64 %off 61 %1 = bitcast i8* %add.ptr to i64* 62 %2 = load i64, i64* %1, align 8, !tbaa !3 63 ret i64 %2 64 } 65 66 attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" } 67 attributes #1 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" } 68 69 !llvm.module.flags = !{!0, !1} 70 !llvm.ident = !{!2} 71 72 !0 = !{i32 1, !"wchar_size", i32 4} 73 !1 = !{i32 7, !"PIC Level", i32 2} 74 !2 = !{!"clang version 6.0.0 (trunk 318832)"} 75 !3 = !{!4, !4, i64 0} 76 !4 = !{!"long long", !5, i64 0} 77 !5 = !{!"omnipotent char", !6, i64 0} 78 !6 = !{!"Simple C/C++ TBAA"} 79 80 ... 81 --- 82 name: unsafeAddR0R3 83 alignment: 4 84 exposesReturnsTwice: false 85 legalized: false 86 regBankSelected: false 87 selected: false 88 tracksRegLiveness: true 89 registers: 90 - { id: 0, class: g8rc, preferred-register: '' } 91 - { id: 1, class: g8rc, preferred-register: '' } 92 - { id: 2, class: gprc, preferred-register: '' } 93 - { id: 3, class: gprc, preferred-register: '' } 94 - { id: 4, class: gprc, preferred-register: '' } 95 - { id: 5, class: g8rc, preferred-register: '' } 96 liveins: 97 - { reg: '$x3', virtual-reg: '%0' } 98 - { reg: '$x4', virtual-reg: '%1' } 99 frameInfo: 100 isFrameAddressTaken: false 101 isReturnAddressTaken: false 102 hasStackMap: false 103 hasPatchPoint: false 104 stackSize: 0 105 offsetAdjustment: 0 106 maxAlignment: 0 107 adjustsStack: false 108 hasCalls: false 109 stackProtector: '' 110 maxCallFrameSize: 4294967295 111 hasOpaqueSPAdjustment: false 112 hasVAStart: false 113 hasMustTailInVarArgFunc: false 114 savePoint: '' 115 restorePoint: '' 116 fixedStack: 117 stack: 118 constants: 119 body: | 120 bb.0.entry: 121 liveins: $x0, $x4 122 123 %1:g8rc = COPY $x4 124 %0:g8rc = COPY $x0 125 %2:gprc = LI 44 126 %3:gprc = COPY %1.sub_32 127 %4:gprc = ADD4 killed $r0, killed %2 128 ; CHECK: li 3, 44 129 ; CHECK: add 3, 0, 3 130 %5:g8rc = EXTSW_32_64 killed %4 131 $x3 = COPY %5 132 BLR8 implicit $lr8, implicit $rm, implicit $x3 133 134 ... 135 --- 136 name: unsafeAddR3R0 137 alignment: 4 138 exposesReturnsTwice: false 139 legalized: false 140 regBankSelected: false 141 selected: false 142 tracksRegLiveness: true 143 registers: 144 - { id: 0, class: g8rc, preferred-register: '' } 145 - { id: 1, class: g8rc, preferred-register: '' } 146 - { id: 2, class: gprc, preferred-register: '' } 147 - { id: 3, class: gprc, preferred-register: '' } 148 - { id: 4, class: gprc, preferred-register: '' } 149 - { id: 5, class: g8rc, preferred-register: '' } 150 liveins: 151 - { reg: '$x3', virtual-reg: '%0' } 152 - { reg: '$x4', virtual-reg: '%1' } 153 frameInfo: 154 isFrameAddressTaken: false 155 isReturnAddressTaken: false 156 hasStackMap: false 157 hasPatchPoint: false 158 stackSize: 0 159 offsetAdjustment: 0 160 maxAlignment: 0 161 adjustsStack: false 162 hasCalls: false 163 stackProtector: '' 164 maxCallFrameSize: 4294967295 165 hasOpaqueSPAdjustment: false 166 hasVAStart: false 167 hasMustTailInVarArgFunc: false 168 savePoint: '' 169 restorePoint: '' 170 fixedStack: 171 stack: 172 constants: 173 body: | 174 bb.0.entry: 175 liveins: $x0, $x4 176 177 %1:g8rc = COPY $x4 178 %0:g8rc = COPY $x0 179 %2:gprc = COPY %0.sub_32 180 %3:gprc = LI 44 181 %4:gprc = ADD4 killed %3, killed $r0 182 ; CHECK: li 3, 44 183 ; CHECK: add 3, 3, 0 184 %5:g8rc = EXTSW_32_64 killed %4 185 $x3 = COPY %5 186 BLR8 implicit $lr8, implicit $rm, implicit $x3 187 188 ... 189 --- 190 name: safeAddR0R3 191 alignment: 4 192 exposesReturnsTwice: false 193 legalized: false 194 regBankSelected: false 195 selected: false 196 tracksRegLiveness: true 197 registers: 198 - { id: 0, class: g8rc, preferred-register: '' } 199 - { id: 1, class: g8rc, preferred-register: '' } 200 - { id: 2, class: gprc, preferred-register: '' } 201 - { id: 3, class: gprc, preferred-register: '' } 202 - { id: 4, class: gprc, preferred-register: '' } 203 - { id: 5, class: g8rc, preferred-register: '' } 204 liveins: 205 - { reg: '$x3', virtual-reg: '%0' } 206 - { reg: '$x4', virtual-reg: '%1' } 207 frameInfo: 208 isFrameAddressTaken: false 209 isReturnAddressTaken: false 210 hasStackMap: false 211 hasPatchPoint: false 212 stackSize: 0 213 offsetAdjustment: 0 214 maxAlignment: 0 215 adjustsStack: false 216 hasCalls: false 217 stackProtector: '' 218 maxCallFrameSize: 4294967295 219 hasOpaqueSPAdjustment: false 220 hasVAStart: false 221 hasMustTailInVarArgFunc: false 222 savePoint: '' 223 restorePoint: '' 224 fixedStack: 225 stack: 226 constants: 227 body: | 228 bb.0.entry: 229 liveins: $x3, $x4 230 231 %1:g8rc = COPY $x4 232 %0:g8rc = COPY $x3 233 %2:gprc = COPY %0.sub_32 234 $r0 = LI 44 235 %4:gprc = ADD4 killed $r0, killed %2 236 ; CHECK: addi 3, 3, 44 237 %5:g8rc = EXTSW_32_64 killed %4 238 $x3 = COPY %5 239 BLR8 implicit $lr8, implicit $rm, implicit $x3 240 241 ... 242 --- 243 name: safeAddR3R0 244 alignment: 4 245 exposesReturnsTwice: false 246 legalized: false 247 regBankSelected: false 248 selected: false 249 tracksRegLiveness: true 250 registers: 251 - { id: 0, class: g8rc, preferred-register: '' } 252 - { id: 1, class: g8rc, preferred-register: '' } 253 - { id: 2, class: gprc, preferred-register: '' } 254 - { id: 3, class: gprc, preferred-register: '' } 255 - { id: 4, class: gprc, preferred-register: '' } 256 - { id: 5, class: g8rc, preferred-register: '' } 257 liveins: 258 - { reg: '$x3', virtual-reg: '%0' } 259 - { reg: '$x4', virtual-reg: '%1' } 260 frameInfo: 261 isFrameAddressTaken: false 262 isReturnAddressTaken: false 263 hasStackMap: false 264 hasPatchPoint: false 265 stackSize: 0 266 offsetAdjustment: 0 267 maxAlignment: 0 268 adjustsStack: false 269 hasCalls: false 270 stackProtector: '' 271 maxCallFrameSize: 4294967295 272 hasOpaqueSPAdjustment: false 273 hasVAStart: false 274 hasMustTailInVarArgFunc: false 275 savePoint: '' 276 restorePoint: '' 277 fixedStack: 278 stack: 279 constants: 280 body: | 281 bb.0.entry: 282 liveins: $x3, $x4 283 284 %1:g8rc = COPY $x4 285 %0:g8rc = COPY $x3 286 %2:gprc = COPY %0.sub_32 287 $r0 = LI 44 288 %4:gprc = ADD4 killed %2, killed $r0 289 ; CHECK: addi 3, 3, 44 290 %5:g8rc = EXTSW_32_64 killed %4 291 $x3 = COPY %5 292 BLR8 implicit $lr8, implicit $rm, implicit $x3 293 294 ... 295 --- 296 name: unsafeLDXR3R0 297 alignment: 4 298 exposesReturnsTwice: false 299 legalized: false 300 regBankSelected: false 301 selected: false 302 tracksRegLiveness: true 303 registers: 304 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 305 - { id: 1, class: g8rc, preferred-register: '' } 306 - { id: 2, class: g8rc, preferred-register: '' } 307 liveins: 308 - { reg: '$x0', virtual-reg: '%0' } 309 - { reg: '$x4', virtual-reg: '%1' } 310 frameInfo: 311 isFrameAddressTaken: false 312 isReturnAddressTaken: false 313 hasStackMap: false 314 hasPatchPoint: false 315 stackSize: 0 316 offsetAdjustment: 0 317 maxAlignment: 0 318 adjustsStack: false 319 hasCalls: false 320 stackProtector: '' 321 maxCallFrameSize: 4294967295 322 hasOpaqueSPAdjustment: false 323 hasVAStart: false 324 hasMustTailInVarArgFunc: false 325 savePoint: '' 326 restorePoint: '' 327 fixedStack: 328 stack: 329 constants: 330 body: | 331 bb.0.entry: 332 liveins: $x0, $x4 333 334 %1:g8rc = COPY $x4 335 %0:g8rc_and_g8rc_nox0 = LI8 44 336 %2:g8rc = LDX %0, $x0 :: (load 8 from %ir.1, !tbaa !3) 337 ; CHECK: li 3, 44 338 ; CHECK: ldx 3, 3, 0 339 $x3 = COPY %2 340 BLR8 implicit $lr8, implicit $rm, implicit $x3 341 342 ... 343 --- 344 name: safeLDXZeroR3 345 alignment: 4 346 exposesReturnsTwice: false 347 legalized: false 348 regBankSelected: false 349 selected: false 350 tracksRegLiveness: true 351 registers: 352 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 353 - { id: 1, class: g8rc, preferred-register: '' } 354 - { id: 2, class: g8rc, preferred-register: '' } 355 liveins: 356 - { reg: '$x3', virtual-reg: '%0' } 357 - { reg: '$x4', virtual-reg: '%1' } 358 frameInfo: 359 isFrameAddressTaken: false 360 isReturnAddressTaken: false 361 hasStackMap: false 362 hasPatchPoint: false 363 stackSize: 0 364 offsetAdjustment: 0 365 maxAlignment: 0 366 adjustsStack: false 367 hasCalls: false 368 stackProtector: '' 369 maxCallFrameSize: 4294967295 370 hasOpaqueSPAdjustment: false 371 hasVAStart: false 372 hasMustTailInVarArgFunc: false 373 savePoint: '' 374 restorePoint: '' 375 fixedStack: 376 stack: 377 constants: 378 body: | 379 bb.0.entry: 380 liveins: $x3, $x4 381 382 %1:g8rc = LI8 44 383 %0:g8rc_and_g8rc_nox0 = LI8 44 384 %2:g8rc = LDX $zero8, %1 :: (load 8 from %ir.1, !tbaa !3) 385 ; CHECK: ld 3, 44(0) 386 $x3 = COPY %2 387 BLR8 implicit $lr8, implicit $rm, implicit $x3 388 389 ... 390 --- 391 name: safeLDXR3R0 392 alignment: 4 393 exposesReturnsTwice: false 394 legalized: false 395 regBankSelected: false 396 selected: false 397 tracksRegLiveness: true 398 registers: 399 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 400 - { id: 1, class: g8rc, preferred-register: '' } 401 - { id: 2, class: g8rc, preferred-register: '' } 402 liveins: 403 - { reg: '$x3', virtual-reg: '%0' } 404 - { reg: '$x4', virtual-reg: '%1' } 405 frameInfo: 406 isFrameAddressTaken: false 407 isReturnAddressTaken: false 408 hasStackMap: false 409 hasPatchPoint: false 410 stackSize: 0 411 offsetAdjustment: 0 412 maxAlignment: 0 413 adjustsStack: false 414 hasCalls: false 415 stackProtector: '' 416 maxCallFrameSize: 4294967295 417 hasOpaqueSPAdjustment: false 418 hasVAStart: false 419 hasMustTailInVarArgFunc: false 420 savePoint: '' 421 restorePoint: '' 422 fixedStack: 423 stack: 424 constants: 425 body: | 426 bb.0.entry: 427 liveins: $x3, $x4 428 429 $x0 = LI8 44 430 %0:g8rc_and_g8rc_nox0 = COPY $x3 431 %2:g8rc = LDX %0, $x0 :: (load 8 from %ir.1, !tbaa !3) 432 ; CHECK: ld 3, 44(3) 433 $x3 = COPY %2 434 BLR8 implicit $lr8, implicit $rm, implicit $x3 435 436 ... 437
