1 # RUN: llc -run-pass ppc-mi-peepholes -ppc-convert-rr-to-ri %s -o - | FileCheck %s 2 # RUN: llc -start-after ppc-mi-peepholes -ppc-late-peephole %s -o - | FileCheck %s --check-prefix=CHECK-LATE 3 4 --- | 5 ; ModuleID = 'convert-rr-to-ri-instrs.ll' 6 source_filename = "convert-rr-to-ri-instrs.c" 7 target datalayout = "e-m:e-i64:64-n32:64" 8 target triple = "powerpc64le-unknown-linux-gnu" 9 10 ; Function Attrs: norecurse nounwind readnone 11 define zeroext i32 @testRLWNM(i32 zeroext %a) local_unnamed_addr #0 { 12 entry: 13 %shl = shl i32 %a, 4 14 %and = and i32 %shl, 4080 15 ret i32 %and 16 } 17 18 ; Function Attrs: norecurse nounwind readnone 19 define i64 @testRLWNM8(i64 %a) local_unnamed_addr #0 { 20 entry: 21 %shl = shl i64 %a, 4 22 %and = and i64 %shl, 4080 23 ret i64 %and 24 } 25 26 ; Function Attrs: norecurse nounwind readnone 27 define zeroext i32 @testRLWNMo(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 28 entry: 29 %and = and i32 %a, 255 30 %tobool = icmp eq i32 %and, 0 31 %cond = select i1 %tobool, i32 %b, i32 %a 32 ret i32 %cond 33 } 34 35 ; Function Attrs: norecurse nounwind readnone 36 define i64 @testRLWNM8o(i64 %a, i64 %b) local_unnamed_addr #0 { 37 entry: 38 %a.tr = trunc i64 %a to i32 39 %0 = shl i32 %a.tr, 4 40 %conv = and i32 %0, 4080 41 %tobool = icmp eq i32 %conv, 0 42 %conv1 = zext i32 %conv to i64 43 %cond = select i1 %tobool, i64 %b, i64 %conv1 44 ret i64 %cond 45 } 46 47 ; Function Attrs: norecurse nounwind readnone 48 define zeroext i32 @testSLW(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 49 entry: 50 %shl = shl i32 %a, %b 51 ret i32 %shl 52 } 53 54 ; Function Attrs: norecurse nounwind readnone 55 define zeroext i32 @testSLWo(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 56 entry: 57 %shl = shl i32 %a, %b 58 %tobool = icmp eq i32 %shl, 0 59 %cond = select i1 %tobool, i32 %b, i32 %a 60 ret i32 %cond 61 } 62 63 ; Function Attrs: norecurse nounwind readnone 64 define zeroext i32 @testSRW(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 65 entry: 66 %shr = lshr i32 %a, %b 67 ret i32 %shr 68 } 69 70 ; Function Attrs: norecurse nounwind readnone 71 define zeroext i32 @testSRWo(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 72 entry: 73 %shr = lshr i32 %a, %b 74 %tobool = icmp eq i32 %shr, 0 75 %cond = select i1 %tobool, i32 %b, i32 %a 76 ret i32 %cond 77 } 78 79 ; Function Attrs: norecurse nounwind readnone 80 define signext i32 @testSRAW(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 81 entry: 82 %shr = ashr i32 %a, %b 83 ret i32 %shr 84 } 85 86 ; Function Attrs: norecurse nounwind readnone 87 define signext i32 @testSRAWo(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 88 entry: 89 %shr = ashr i32 %a, %b 90 %tobool = icmp eq i32 %shr, 0 91 %cond = select i1 %tobool, i32 %b, i32 %shr 92 ret i32 %cond 93 } 94 95 ; Function Attrs: norecurse nounwind readnone 96 define i64 @testRLDCL(i64 %a, i64 %b) local_unnamed_addr #0 { 97 entry: 98 %and = and i64 %b, 63 99 %shl = shl i64 %a, %and 100 %sub = sub nsw i64 64, %and 101 %shr = lshr i64 %a, %sub 102 %or = or i64 %shr, %shl 103 ret i64 %or 104 } 105 106 ; Function Attrs: norecurse nounwind readnone 107 define i64 @testRLDCLo(i64 %a, i64 %b) local_unnamed_addr #0 { 108 entry: 109 %and = and i64 %b, 63 110 %shl = shl i64 %a, %and 111 %sub = sub nsw i64 64, %and 112 %shr = lshr i64 %a, %sub 113 %or = or i64 %shr, %shl 114 %tobool = icmp eq i64 %or, 0 115 %cond = select i1 %tobool, i64 %and, i64 %a 116 ret i64 %cond 117 } 118 119 ; Function Attrs: norecurse nounwind readnone 120 define i64 @testRLDCR(i64 %a, i64 %b) local_unnamed_addr #0 { 121 entry: 122 %and = and i64 %b, 63 123 %shl = shl i64 %a, %and 124 %sub = sub nsw i64 64, %and 125 %shr = lshr i64 %a, %sub 126 %or = or i64 %shr, %shl 127 ret i64 %or 128 } 129 130 ; Function Attrs: norecurse nounwind readnone 131 define i64 @testRLDCRo(i64 %a, i64 %b) local_unnamed_addr #0 { 132 entry: 133 %and = and i64 %b, 63 134 %shl = shl i64 %a, %and 135 %sub = sub nsw i64 64, %and 136 %shr = lshr i64 %a, %sub 137 %or = or i64 %shr, %shl 138 %tobool = icmp eq i64 %or, 0 139 %cond = select i1 %tobool, i64 %and, i64 %a 140 ret i64 %cond 141 } 142 143 define i64 @testSLD(i64 %a, i64 %b) local_unnamed_addr #0 { 144 entry: 145 %shl = shl i64 %a, %b 146 ret i64 %shl 147 } 148 149 ; Function Attrs: norecurse nounwind readnone 150 define i64 @testSLDo(i64 %a, i64 %b) local_unnamed_addr #0 { 151 entry: 152 %shl = shl i64 %a, %b 153 %tobool = icmp eq i64 %shl, 0 154 %cond = select i1 %tobool, i64 %b, i64 %a 155 ret i64 %cond 156 } 157 158 ; Function Attrs: norecurse nounwind readnone 159 define i64 @testSRD(i64 %a, i64 %b) local_unnamed_addr #0 { 160 entry: 161 %shr = lshr i64 %a, %b 162 ret i64 %shr 163 } 164 165 ; Function Attrs: norecurse nounwind readnone 166 define i64 @testSRDo(i64 %a, i64 %b) local_unnamed_addr #0 { 167 entry: 168 %shr = lshr i64 %a, %b 169 %tobool = icmp eq i64 %shr, 0 170 %cond = select i1 %tobool, i64 %b, i64 %a 171 ret i64 %cond 172 } 173 174 ; Function Attrs: norecurse nounwind readnone 175 define i64 @testSRAD(i64 %a, i64 %b) local_unnamed_addr #0 { 176 entry: 177 %shr = ashr i64 %a, %b 178 ret i64 %shr 179 } 180 181 ; Function Attrs: norecurse nounwind readnone 182 define i64 @testSRADo(i64 %a, i64 %b) local_unnamed_addr #0 { 183 entry: 184 %shr = ashr i64 %a, %b 185 %tobool = icmp eq i64 %shr, 0 186 %cond = select i1 %tobool, i64 %b, i64 %shr 187 ret i64 %cond 188 } 189 190 attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pwr9" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" } 191 192 !llvm.module.flags = !{!0, !1} 193 !llvm.ident = !{!2} 194 195 !0 = !{i32 1, !"wchar_size", i32 4} 196 !1 = !{i32 7, !"PIC Level", i32 2} 197 !2 = !{!"clang version 6.0.0 (trunk 316067)"} 198 !3 = !{!4, !4, i64 0} 199 !4 = !{!"omnipotent char", !5, i64 0} 200 !5 = !{!"Simple C/C++ TBAA"} 201 !6 = !{!7, !7, i64 0} 202 !7 = !{!"short", !4, i64 0} 203 !8 = !{!9, !9, i64 0} 204 !9 = !{!"int", !4, i64 0} 205 !10 = !{!11, !11, i64 0} 206 !11 = !{!"long long", !4, i64 0} 207 !12 = !{!13, !13, i64 0} 208 !13 = !{!"double", !4, i64 0} 209 !14 = !{!15, !15, i64 0} 210 !15 = !{!"float", !4, i64 0} 211 212 ... 213 --- 214 name: testRLWNM 215 # CHECK-ALL: name: testRLWNM 216 alignment: 4 217 exposesReturnsTwice: false 218 legalized: false 219 regBankSelected: false 220 selected: false 221 tracksRegLiveness: true 222 registers: 223 - { id: 0, class: g8rc, preferred-register: '' } 224 - { id: 1, class: gprc, preferred-register: '' } 225 - { id: 2, class: gprc, preferred-register: '' } 226 - { id: 3, class: g8rc, preferred-register: '' } 227 - { id: 4, class: gprc, preferred-register: '' } 228 liveins: 229 - { reg: '$x3', virtual-reg: '%0' } 230 frameInfo: 231 isFrameAddressTaken: false 232 isReturnAddressTaken: false 233 hasStackMap: false 234 hasPatchPoint: false 235 stackSize: 0 236 offsetAdjustment: 0 237 maxAlignment: 0 238 adjustsStack: false 239 hasCalls: false 240 stackProtector: '' 241 maxCallFrameSize: 4294967295 242 hasOpaqueSPAdjustment: false 243 hasVAStart: false 244 hasMustTailInVarArgFunc: false 245 savePoint: '' 246 restorePoint: '' 247 fixedStack: 248 stack: 249 constants: 250 body: | 251 bb.0.entry: 252 liveins: $x3 253 254 %0 = COPY $x3 255 %1 = COPY %0.sub_32 256 %3 = IMPLICIT_DEF 257 %2 = LI 170 258 %4 = RLWNM killed %1, %2, 20, 27 259 ; CHECK: RLWINM killed %1, 10, 20, 27 260 ; CHECK-LATE: rlwinm 3, 3, 10, 20, 27 261 $x3 = EXTSW_32_64 %4 262 BLR8 implicit $lr8, implicit $rm, implicit $x3 263 264 ... 265 --- 266 name: testRLWNM8 267 # CHECK-ALL: name: testRLWNM8 268 alignment: 4 269 exposesReturnsTwice: false 270 legalized: false 271 regBankSelected: false 272 selected: false 273 tracksRegLiveness: true 274 registers: 275 - { id: 0, class: g8rc, preferred-register: '' } 276 - { id: 1, class: g8rc, preferred-register: '' } 277 - { id: 2, class: g8rc, preferred-register: '' } 278 liveins: 279 - { reg: '$x3', virtual-reg: '%0' } 280 frameInfo: 281 isFrameAddressTaken: false 282 isReturnAddressTaken: false 283 hasStackMap: false 284 hasPatchPoint: false 285 stackSize: 0 286 offsetAdjustment: 0 287 maxAlignment: 0 288 adjustsStack: false 289 hasCalls: false 290 stackProtector: '' 291 maxCallFrameSize: 4294967295 292 hasOpaqueSPAdjustment: false 293 hasVAStart: false 294 hasMustTailInVarArgFunc: false 295 savePoint: '' 296 restorePoint: '' 297 fixedStack: 298 stack: 299 constants: 300 body: | 301 bb.0.entry: 302 liveins: $x3 303 304 %0 = LI8 234 305 %1 = COPY $x3 306 %2 = RLWNM8 %1, %0, 20, 27 307 ; CHECK: RLWINM8 %1, 10, 20, 27 308 ; CHECK-LATE: rlwinm 3, 3, 10, 20, 27 309 $x3 = COPY %2 310 BLR8 implicit $lr8, implicit $rm, implicit $x3 311 312 ... 313 --- 314 name: testRLWNMo 315 # CHECK-ALL: name: testRLWNMo 316 alignment: 4 317 exposesReturnsTwice: false 318 legalized: false 319 regBankSelected: false 320 selected: false 321 tracksRegLiveness: true 322 registers: 323 - { id: 0, class: g8rc, preferred-register: '' } 324 - { id: 1, class: g8rc, preferred-register: '' } 325 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 326 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 327 - { id: 4, class: gprc, preferred-register: '' } 328 - { id: 5, class: crrc, preferred-register: '' } 329 - { id: 6, class: gprc, preferred-register: '' } 330 - { id: 7, class: g8rc, preferred-register: '' } 331 - { id: 8, class: g8rc, preferred-register: '' } 332 - { id: 9, class: g8rc, preferred-register: '' } 333 liveins: 334 - { reg: '$x3', virtual-reg: '%0' } 335 - { reg: '$x4', virtual-reg: '%1' } 336 frameInfo: 337 isFrameAddressTaken: false 338 isReturnAddressTaken: false 339 hasStackMap: false 340 hasPatchPoint: false 341 stackSize: 0 342 offsetAdjustment: 0 343 maxAlignment: 0 344 adjustsStack: false 345 hasCalls: false 346 stackProtector: '' 347 maxCallFrameSize: 4294967295 348 hasOpaqueSPAdjustment: false 349 hasVAStart: false 350 hasMustTailInVarArgFunc: false 351 savePoint: '' 352 restorePoint: '' 353 fixedStack: 354 stack: 355 constants: 356 body: | 357 bb.0.entry: 358 liveins: $x3, $x4 359 360 %1 = COPY $x4 361 %0 = COPY $x3 362 %2 = COPY %1.sub_32 363 %3 = LI -22 364 %4 = RLWNMo %2, %3, 24, 31, implicit-def $cr0 365 ; CHECK: RLWINMo %2, 10, 24, 31, implicit-def $cr0 366 ; CHECK-LATE: li 3, -22 367 ; CHECK-LATE: rlwinm. 5, 4, 10, 24, 31 368 %5 = COPY killed $cr0 369 %6 = ISEL %2, %3, %5.sub_eq 370 %8 = IMPLICIT_DEF 371 %7 = INSERT_SUBREG %8, killed %6, 1 372 %9 = RLDICL killed %7, 0, 32 373 $x3 = COPY %9 374 BLR8 implicit $lr8, implicit $rm, implicit $x3 375 376 ... 377 --- 378 name: testRLWNM8o 379 # CHECK-ALL: name: testRLWNM8o 380 alignment: 4 381 exposesReturnsTwice: false 382 legalized: false 383 regBankSelected: false 384 selected: false 385 tracksRegLiveness: true 386 registers: 387 - { id: 0, class: g8rc, preferred-register: '' } 388 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 389 - { id: 2, class: g8rc, preferred-register: '' } 390 - { id: 3, class: g8rc, preferred-register: '' } 391 - { id: 4, class: g8rc, preferred-register: '' } 392 - { id: 5, class: g8rc, preferred-register: '' } 393 - { id: 6, class: g8rc_and_g8rc_nox0, preferred-register: '' } 394 - { id: 7, class: crrc, preferred-register: '' } 395 - { id: 8, class: g8rc, preferred-register: '' } 396 liveins: 397 - { reg: '$x3', virtual-reg: '%0' } 398 - { reg: '$x4', virtual-reg: '%1' } 399 frameInfo: 400 isFrameAddressTaken: false 401 isReturnAddressTaken: false 402 hasStackMap: false 403 hasPatchPoint: false 404 stackSize: 0 405 offsetAdjustment: 0 406 maxAlignment: 0 407 adjustsStack: false 408 hasCalls: false 409 stackProtector: '' 410 maxCallFrameSize: 4294967295 411 hasOpaqueSPAdjustment: false 412 hasVAStart: false 413 hasMustTailInVarArgFunc: false 414 savePoint: '' 415 restorePoint: '' 416 fixedStack: 417 stack: 418 constants: 419 body: | 420 bb.0.entry: 421 liveins: $x3, $x4 422 423 %1 = COPY $x4 424 %0 = COPY $x3 425 %2 = LI8 -18 426 %3 = RLWNM8o %1, %2, 20, 27, implicit-def $cr0 427 ; CHECK: RLWINM8o %1, 14, 20, 27, implicit-def $cr0 428 ; CHECK-LATE: rlwinm. 3, 4, 14, 20, 27 429 %7 = COPY killed $cr0 430 %6 = RLDICL killed %3, 0, 32 431 %8 = ISEL8 %1, %6, %7.sub_eq 432 $x3 = COPY %8 433 BLR8 implicit $lr8, implicit $rm, implicit $x3 434 435 ... 436 --- 437 name: testSLW 438 # CHECK-ALL: name: testSLW 439 alignment: 4 440 exposesReturnsTwice: false 441 legalized: false 442 regBankSelected: false 443 selected: false 444 tracksRegLiveness: true 445 registers: 446 - { id: 0, class: g8rc, preferred-register: '' } 447 - { id: 1, class: g8rc, preferred-register: '' } 448 - { id: 2, class: gprc, preferred-register: '' } 449 - { id: 3, class: g8rc, preferred-register: '' } 450 - { id: 4, class: g8rc, preferred-register: '' } 451 - { id: 5, class: gprc, preferred-register: '' } 452 - { id: 6, class: g8rc, preferred-register: '' } 453 - { id: 7, class: g8rc, preferred-register: '' } 454 - { id: 8, class: gprc, preferred-register: '' } 455 liveins: 456 - { reg: '$x3', virtual-reg: '%0' } 457 - { reg: '$x4', virtual-reg: '%1' } 458 frameInfo: 459 isFrameAddressTaken: false 460 isReturnAddressTaken: false 461 hasStackMap: false 462 hasPatchPoint: false 463 stackSize: 0 464 offsetAdjustment: 0 465 maxAlignment: 0 466 adjustsStack: false 467 hasCalls: false 468 stackProtector: '' 469 maxCallFrameSize: 4294967295 470 hasOpaqueSPAdjustment: false 471 hasVAStart: false 472 hasMustTailInVarArgFunc: false 473 savePoint: '' 474 restorePoint: '' 475 fixedStack: 476 stack: 477 constants: 478 body: | 479 bb.0.entry: 480 liveins: $x3, $x4 481 482 %1 = COPY $x4 483 %0 = COPY $x3 484 %2 = COPY %1.sub_32 485 %5 = LI 210 486 %8 = SLW killed %2, killed %5 487 ; CHECK: RLWINM killed %2, 18, 0, 13 488 ; CHECK-LATE: slwi 3, 4, 18 489 $x3 = EXTSW_32_64 %8 490 BLR8 implicit $lr8, implicit $rm, implicit $x3 491 492 ... 493 --- 494 name: testSLWo 495 # CHECK-ALL: name: testSLWo 496 alignment: 4 497 exposesReturnsTwice: false 498 legalized: false 499 regBankSelected: false 500 selected: false 501 tracksRegLiveness: true 502 registers: 503 - { id: 0, class: g8rc, preferred-register: '' } 504 - { id: 1, class: g8rc, preferred-register: '' } 505 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 506 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 507 - { id: 4, class: gprc, preferred-register: '' } 508 - { id: 5, class: crrc, preferred-register: '' } 509 - { id: 6, class: gprc, preferred-register: '' } 510 - { id: 7, class: g8rc, preferred-register: '' } 511 - { id: 8, class: g8rc, preferred-register: '' } 512 - { id: 9, class: g8rc, preferred-register: '' } 513 liveins: 514 - { reg: '$x3', virtual-reg: '%0' } 515 - { reg: '$x4', virtual-reg: '%1' } 516 frameInfo: 517 isFrameAddressTaken: false 518 isReturnAddressTaken: false 519 hasStackMap: false 520 hasPatchPoint: false 521 stackSize: 0 522 offsetAdjustment: 0 523 maxAlignment: 0 524 adjustsStack: false 525 hasCalls: false 526 stackProtector: '' 527 maxCallFrameSize: 4294967295 528 hasOpaqueSPAdjustment: false 529 hasVAStart: false 530 hasMustTailInVarArgFunc: false 531 savePoint: '' 532 restorePoint: '' 533 fixedStack: 534 stack: 535 constants: 536 body: | 537 bb.0.entry: 538 liveins: $x3, $x4 539 540 %1 = COPY $x4 541 %0 = COPY $x3 542 %2 = LI 35 543 %3 = COPY %0.sub_32 544 %4 = SLWo %3, %2, implicit-def $cr0 545 ; CHECK: ANDIo %3, 0, implicit-def $cr0 546 ; CHECK-LATE: andi. 5, 3, 0 547 %5 = COPY killed $cr0 548 %6 = ISEL %2, %3, %5.sub_eq 549 %8 = IMPLICIT_DEF 550 %7 = INSERT_SUBREG %8, killed %6, 1 551 %9 = RLDICL killed %7, 0, 32 552 $x3 = COPY %9 553 BLR8 implicit $lr8, implicit $rm, implicit $x3 554 555 ... 556 --- 557 name: testSRW 558 # CHECK-ALL: name: testSRW 559 alignment: 4 560 exposesReturnsTwice: false 561 legalized: false 562 regBankSelected: false 563 selected: false 564 tracksRegLiveness: true 565 registers: 566 - { id: 0, class: g8rc, preferred-register: '' } 567 - { id: 1, class: g8rc, preferred-register: '' } 568 - { id: 2, class: gprc, preferred-register: '' } 569 - { id: 3, class: g8rc, preferred-register: '' } 570 - { id: 4, class: g8rc, preferred-register: '' } 571 - { id: 5, class: gprc, preferred-register: '' } 572 - { id: 6, class: g8rc, preferred-register: '' } 573 - { id: 7, class: g8rc, preferred-register: '' } 574 - { id: 8, class: gprc, preferred-register: '' } 575 liveins: 576 - { reg: '$x3', virtual-reg: '%0' } 577 - { reg: '$x4', virtual-reg: '%1' } 578 frameInfo: 579 isFrameAddressTaken: false 580 isReturnAddressTaken: false 581 hasStackMap: false 582 hasPatchPoint: false 583 stackSize: 0 584 offsetAdjustment: 0 585 maxAlignment: 0 586 adjustsStack: false 587 hasCalls: false 588 stackProtector: '' 589 maxCallFrameSize: 4294967295 590 hasOpaqueSPAdjustment: false 591 hasVAStart: false 592 hasMustTailInVarArgFunc: false 593 savePoint: '' 594 restorePoint: '' 595 fixedStack: 596 stack: 597 constants: 598 body: | 599 bb.0.entry: 600 liveins: $x3, $x4 601 602 %1 = COPY $x4 603 %0 = COPY $x3 604 %2 = LI 48 605 %5 = COPY %0.sub_32 606 %8 = SRW killed %5, killed %2 607 ; CHECK: LI 0 608 ; CHECK-LATE: li 3, 0 609 $x3 = EXTSW_32_64 %8 610 BLR8 implicit $lr8, implicit $rm, implicit $x3 611 612 ... 613 --- 614 name: testSRWo 615 # CHECK-ALL: name: testSRWo 616 alignment: 4 617 exposesReturnsTwice: false 618 legalized: false 619 regBankSelected: false 620 selected: false 621 tracksRegLiveness: true 622 registers: 623 - { id: 0, class: g8rc, preferred-register: '' } 624 - { id: 1, class: g8rc, preferred-register: '' } 625 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 626 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 627 - { id: 4, class: gprc, preferred-register: '' } 628 - { id: 5, class: crrc, preferred-register: '' } 629 - { id: 6, class: gprc, preferred-register: '' } 630 - { id: 7, class: g8rc, preferred-register: '' } 631 - { id: 8, class: g8rc, preferred-register: '' } 632 - { id: 9, class: g8rc, preferred-register: '' } 633 liveins: 634 - { reg: '$x3', virtual-reg: '%0' } 635 - { reg: '$x4', virtual-reg: '%1' } 636 frameInfo: 637 isFrameAddressTaken: false 638 isReturnAddressTaken: false 639 hasStackMap: false 640 hasPatchPoint: false 641 stackSize: 0 642 offsetAdjustment: 0 643 maxAlignment: 0 644 adjustsStack: false 645 hasCalls: false 646 stackProtector: '' 647 maxCallFrameSize: 4294967295 648 hasOpaqueSPAdjustment: false 649 hasVAStart: false 650 hasMustTailInVarArgFunc: false 651 savePoint: '' 652 restorePoint: '' 653 fixedStack: 654 stack: 655 constants: 656 body: | 657 bb.0.entry: 658 liveins: $x3, $x4 659 660 %1 = COPY $x4 661 %0 = COPY $x3 662 %2 = LI -7 663 %3 = COPY %0.sub_32 664 %4 = SRWo %3, %2, implicit-def $cr0 665 ; CHECK: ANDIo %3, 0, implicit-def $cr0 666 ; CHECK-LATE: andi. 5, 3, 0 667 %5 = COPY killed $cr0 668 %6 = ISEL %2, %3, %5.sub_eq 669 %8 = IMPLICIT_DEF 670 %7 = INSERT_SUBREG %8, killed %6, 1 671 %9 = RLDICL killed %7, 0, 32 672 $x3 = COPY %9 673 BLR8 implicit $lr8, implicit $rm, implicit $x3 674 675 ... 676 --- 677 name: testSRAW 678 # CHECK-ALL: name: testSRAW 679 alignment: 4 680 exposesReturnsTwice: false 681 legalized: false 682 regBankSelected: false 683 selected: false 684 tracksRegLiveness: true 685 registers: 686 - { id: 0, class: g8rc, preferred-register: '' } 687 - { id: 1, class: g8rc, preferred-register: '' } 688 - { id: 2, class: gprc, preferred-register: '' } 689 - { id: 3, class: gprc, preferred-register: '' } 690 - { id: 4, class: gprc, preferred-register: '' } 691 - { id: 5, class: g8rc, preferred-register: '' } 692 liveins: 693 - { reg: '$x3', virtual-reg: '%0' } 694 - { reg: '$x4', virtual-reg: '%1' } 695 frameInfo: 696 isFrameAddressTaken: false 697 isReturnAddressTaken: false 698 hasStackMap: false 699 hasPatchPoint: false 700 stackSize: 0 701 offsetAdjustment: 0 702 maxAlignment: 0 703 adjustsStack: false 704 hasCalls: false 705 stackProtector: '' 706 maxCallFrameSize: 4294967295 707 hasOpaqueSPAdjustment: false 708 hasVAStart: false 709 hasMustTailInVarArgFunc: false 710 savePoint: '' 711 restorePoint: '' 712 fixedStack: 713 stack: 714 constants: 715 body: | 716 bb.0.entry: 717 liveins: $x3, $x4 718 719 %1 = COPY $x4 720 %0 = COPY $x3 721 %2 = LI 48 722 %3 = COPY %0.sub_32 723 %4 = SRAW killed %3, killed %2, implicit-def dead $carry 724 ; CHECK: LI 48 725 ; CHECK: SRAW killed %3, killed %2, implicit-def dead $carry 726 ; CHECK-LATE: sraw 3, 3, 4 727 %5 = EXTSW_32_64 killed %4 728 $x3 = COPY %5 729 BLR8 implicit $lr8, implicit $rm, implicit $x3 730 731 ... 732 --- 733 name: testSRAWo 734 # CHECK-ALL: name: testSRAWo 735 alignment: 4 736 exposesReturnsTwice: false 737 legalized: false 738 regBankSelected: false 739 selected: false 740 tracksRegLiveness: true 741 registers: 742 - { id: 0, class: g8rc, preferred-register: '' } 743 - { id: 1, class: g8rc, preferred-register: '' } 744 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 745 - { id: 3, class: gprc, preferred-register: '' } 746 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 747 - { id: 5, class: crrc, preferred-register: '' } 748 - { id: 6, class: gprc, preferred-register: '' } 749 - { id: 7, class: g8rc, preferred-register: '' } 750 liveins: 751 - { reg: '$x3', virtual-reg: '%0' } 752 - { reg: '$x4', virtual-reg: '%1' } 753 frameInfo: 754 isFrameAddressTaken: false 755 isReturnAddressTaken: false 756 hasStackMap: false 757 hasPatchPoint: false 758 stackSize: 0 759 offsetAdjustment: 0 760 maxAlignment: 0 761 adjustsStack: false 762 hasCalls: false 763 stackProtector: '' 764 maxCallFrameSize: 4294967295 765 hasOpaqueSPAdjustment: false 766 hasVAStart: false 767 hasMustTailInVarArgFunc: false 768 savePoint: '' 769 restorePoint: '' 770 fixedStack: 771 stack: 772 constants: 773 body: | 774 bb.0.entry: 775 liveins: $x3, $x4 776 777 %1 = COPY $x4 778 %0 = COPY $x3 779 %2 = LI 80 780 %3 = COPY %0.sub_32 781 %4 = SRAWo killed %3, %2, implicit-def dead $carry, implicit-def $cr0 782 ; CHECK: SRAWo killed %3, %2, implicit-def dead $carry, implicit-def $cr0 783 ; CHECK-LATE: sraw. 3, 3, 4 784 %5 = COPY killed $cr0 785 %6 = ISEL %2, %4, %5.sub_eq 786 %7 = EXTSW_32_64 killed %6 787 $x3 = COPY %7 788 BLR8 implicit $lr8, implicit $rm, implicit $x3 789 790 ... 791 --- 792 name: testRLDCL 793 # CHECK-ALL: name: testRLDCL 794 alignment: 4 795 exposesReturnsTwice: false 796 legalized: false 797 regBankSelected: false 798 selected: false 799 tracksRegLiveness: true 800 registers: 801 - { id: 0, class: g8rc, preferred-register: '' } 802 - { id: 1, class: g8rc, preferred-register: '' } 803 - { id: 2, class: gprc, preferred-register: '' } 804 - { id: 3, class: gprc, preferred-register: '' } 805 - { id: 4, class: g8rc, preferred-register: '' } 806 liveins: 807 - { reg: '$x3', virtual-reg: '%0' } 808 - { reg: '$x4', virtual-reg: '%1' } 809 frameInfo: 810 isFrameAddressTaken: false 811 isReturnAddressTaken: false 812 hasStackMap: false 813 hasPatchPoint: false 814 stackSize: 0 815 offsetAdjustment: 0 816 maxAlignment: 0 817 adjustsStack: false 818 hasCalls: false 819 stackProtector: '' 820 maxCallFrameSize: 4294967295 821 hasOpaqueSPAdjustment: false 822 hasVAStart: false 823 hasMustTailInVarArgFunc: false 824 savePoint: '' 825 restorePoint: '' 826 fixedStack: 827 stack: 828 constants: 829 body: | 830 bb.0.entry: 831 liveins: $x3, $x4 832 833 %1 = COPY $x4 834 %0 = COPY $x3 835 %2 = COPY %1.sub_32 836 %3 = LI 140 837 %4 = RLDCL %0, killed %3, 0 838 ; CHECK: RLDICL %0, 12, 0 839 ; CHECK-LATE: rotldi 3, 3, 12 840 $x3 = COPY %4 841 BLR8 implicit $lr8, implicit $rm, implicit $x3 842 843 ... 844 --- 845 name: testRLDCLo 846 # CHECK-ALL: name: testRLDCLo 847 alignment: 4 848 exposesReturnsTwice: false 849 legalized: false 850 regBankSelected: false 851 selected: false 852 tracksRegLiveness: true 853 registers: 854 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 855 - { id: 1, class: g8rc, preferred-register: '' } 856 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 857 - { id: 3, class: gprc, preferred-register: '' } 858 - { id: 4, class: g8rc, preferred-register: '' } 859 - { id: 5, class: crrc, preferred-register: '' } 860 - { id: 6, class: g8rc, preferred-register: '' } 861 liveins: 862 - { reg: '$x3', virtual-reg: '%0' } 863 - { reg: '$x4', virtual-reg: '%1' } 864 frameInfo: 865 isFrameAddressTaken: false 866 isReturnAddressTaken: false 867 hasStackMap: false 868 hasPatchPoint: false 869 stackSize: 0 870 offsetAdjustment: 0 871 maxAlignment: 0 872 adjustsStack: false 873 hasCalls: false 874 stackProtector: '' 875 maxCallFrameSize: 4294967295 876 hasOpaqueSPAdjustment: false 877 hasVAStart: false 878 hasMustTailInVarArgFunc: false 879 savePoint: '' 880 restorePoint: '' 881 fixedStack: 882 stack: 883 constants: 884 body: | 885 bb.0.entry: 886 liveins: $x3, $x4 887 888 %1 = COPY $x4 889 %0 = COPY $x3 890 %2 = RLDICL %1, 0, 58 891 %3 = LI -37 892 %4 = RLDCLo %0, killed %3, 0, implicit-def $cr0 893 ; CHECK: RLDICLo %0, 27, 0, implicit-def $cr0 894 ; CHECK-LATE: rldicl. 5, 3, 27, 0 895 %5 = COPY killed $cr0 896 %6 = ISEL8 %2, %0, %5.sub_eq 897 $x3 = COPY %6 898 BLR8 implicit $lr8, implicit $rm, implicit $x3 899 900 ... 901 --- 902 name: testRLDCR 903 # CHECK-ALL: name: testRLDCR 904 alignment: 4 905 exposesReturnsTwice: false 906 legalized: false 907 regBankSelected: false 908 selected: false 909 tracksRegLiveness: true 910 registers: 911 - { id: 0, class: g8rc, preferred-register: '' } 912 - { id: 1, class: g8rc, preferred-register: '' } 913 - { id: 2, class: gprc, preferred-register: '' } 914 - { id: 3, class: gprc, preferred-register: '' } 915 - { id: 4, class: g8rc, preferred-register: '' } 916 liveins: 917 - { reg: '$x3', virtual-reg: '%0' } 918 - { reg: '$x4', virtual-reg: '%1' } 919 frameInfo: 920 isFrameAddressTaken: false 921 isReturnAddressTaken: false 922 hasStackMap: false 923 hasPatchPoint: false 924 stackSize: 0 925 offsetAdjustment: 0 926 maxAlignment: 0 927 adjustsStack: false 928 hasCalls: false 929 stackProtector: '' 930 maxCallFrameSize: 4294967295 931 hasOpaqueSPAdjustment: false 932 hasVAStart: false 933 hasMustTailInVarArgFunc: false 934 savePoint: '' 935 restorePoint: '' 936 fixedStack: 937 stack: 938 constants: 939 body: | 940 bb.0.entry: 941 liveins: $x3, $x4 942 943 %1 = COPY $x4 944 %0 = COPY $x3 945 %2 = COPY %1.sub_32 946 %3 = LI 300 947 %4 = RLDCR %0, killed %3, 0 948 ; CHECK: RLDICR %0, 44, 0 949 ; CHECK-LATE: rldicr 3, 3, 44, 0 950 $x3 = COPY %4 951 BLR8 implicit $lr8, implicit $rm, implicit $x3 952 953 ... 954 --- 955 name: testRLDCRo 956 # CHECK-ALL: name: testRLDCRo 957 alignment: 4 958 exposesReturnsTwice: false 959 legalized: false 960 regBankSelected: false 961 selected: false 962 tracksRegLiveness: true 963 registers: 964 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 965 - { id: 1, class: g8rc, preferred-register: '' } 966 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 967 - { id: 3, class: gprc, preferred-register: '' } 968 - { id: 4, class: g8rc, preferred-register: '' } 969 - { id: 5, class: crrc, preferred-register: '' } 970 - { id: 6, class: g8rc, preferred-register: '' } 971 liveins: 972 - { reg: '$x3', virtual-reg: '%0' } 973 - { reg: '$x4', virtual-reg: '%1' } 974 frameInfo: 975 isFrameAddressTaken: false 976 isReturnAddressTaken: false 977 hasStackMap: false 978 hasPatchPoint: false 979 stackSize: 0 980 offsetAdjustment: 0 981 maxAlignment: 0 982 adjustsStack: false 983 hasCalls: false 984 stackProtector: '' 985 maxCallFrameSize: 4294967295 986 hasOpaqueSPAdjustment: false 987 hasVAStart: false 988 hasMustTailInVarArgFunc: false 989 savePoint: '' 990 restorePoint: '' 991 fixedStack: 992 stack: 993 constants: 994 body: | 995 bb.0.entry: 996 liveins: $x3, $x4 997 998 %1 = COPY $x4 999 %0 = COPY $x3 1000 %2 = RLDICL %1, 0, 58 1001 %3 = LI -18 1002 %4 = RLDCRo %0, killed %3, 0, implicit-def $cr0 1003 ; CHECK: RLDICRo %0, 46, 0, implicit-def $cr0 1004 ; CHECK-LATE: rldicr. 5, 3, 46, 0 1005 %5 = COPY killed $cr0 1006 %6 = ISEL8 %2, %0, %5.sub_eq 1007 $x3 = COPY %6 1008 BLR8 implicit $lr8, implicit $rm, implicit $x3 1009 1010 ... 1011 --- 1012 name: testSLD 1013 # CHECK-ALL: name: testSLD 1014 alignment: 4 1015 exposesReturnsTwice: false 1016 legalized: false 1017 regBankSelected: false 1018 selected: false 1019 tracksRegLiveness: true 1020 registers: 1021 - { id: 0, class: g8rc, preferred-register: '' } 1022 - { id: 1, class: g8rc, preferred-register: '' } 1023 - { id: 2, class: gprc, preferred-register: '' } 1024 - { id: 3, class: g8rc, preferred-register: '' } 1025 liveins: 1026 - { reg: '$x3', virtual-reg: '%0' } 1027 - { reg: '$x4', virtual-reg: '%1' } 1028 frameInfo: 1029 isFrameAddressTaken: false 1030 isReturnAddressTaken: false 1031 hasStackMap: false 1032 hasPatchPoint: false 1033 stackSize: 0 1034 offsetAdjustment: 0 1035 maxAlignment: 0 1036 adjustsStack: false 1037 hasCalls: false 1038 stackProtector: '' 1039 maxCallFrameSize: 4294967295 1040 hasOpaqueSPAdjustment: false 1041 hasVAStart: false 1042 hasMustTailInVarArgFunc: false 1043 savePoint: '' 1044 restorePoint: '' 1045 fixedStack: 1046 stack: 1047 constants: 1048 body: | 1049 bb.0.entry: 1050 liveins: $x3, $x4 1051 1052 %1 = COPY $x4 1053 %0 = COPY $x3 1054 %2 = LI -13 1055 %3 = SLD %0, killed %2 1056 ; CHECK: LI8 0 1057 ; CHECK-LATE: li 3, 0 1058 $x3 = COPY %3 1059 BLR8 implicit $lr8, implicit $rm, implicit $x3 1060 1061 ... 1062 --- 1063 name: testSLDo 1064 # CHECK-ALL: name: testSLDo 1065 alignment: 4 1066 exposesReturnsTwice: false 1067 legalized: false 1068 regBankSelected: false 1069 selected: false 1070 tracksRegLiveness: true 1071 registers: 1072 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1073 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1074 - { id: 2, class: gprc, preferred-register: '' } 1075 - { id: 3, class: g8rc, preferred-register: '' } 1076 - { id: 4, class: crrc, preferred-register: '' } 1077 - { id: 5, class: g8rc, preferred-register: '' } 1078 liveins: 1079 - { reg: '$x3', virtual-reg: '%0' } 1080 - { reg: '$x4', virtual-reg: '%1' } 1081 frameInfo: 1082 isFrameAddressTaken: false 1083 isReturnAddressTaken: false 1084 hasStackMap: false 1085 hasPatchPoint: false 1086 stackSize: 0 1087 offsetAdjustment: 0 1088 maxAlignment: 0 1089 adjustsStack: false 1090 hasCalls: false 1091 stackProtector: '' 1092 maxCallFrameSize: 4294967295 1093 hasOpaqueSPAdjustment: false 1094 hasVAStart: false 1095 hasMustTailInVarArgFunc: false 1096 savePoint: '' 1097 restorePoint: '' 1098 fixedStack: 1099 stack: 1100 constants: 1101 body: | 1102 bb.0.entry: 1103 liveins: $x3, $x4 1104 1105 %1 = COPY $x4 1106 %0 = COPY $x3 1107 %2 = LI 88 1108 %3 = SLDo %0, killed %2, implicit-def $cr0 1109 ; CHECK: ANDIo8 %0, 0, implicit-def $cr0 1110 ; CHECK-LATE: andi. 5, 3, 0 1111 %4 = COPY killed $cr0 1112 %5 = ISEL8 %1, %0, %4.sub_eq 1113 $x3 = COPY %5 1114 BLR8 implicit $lr8, implicit $rm, implicit $x3 1115 1116 ... 1117 --- 1118 name: testSRD 1119 # CHECK-ALL: name: testSRD 1120 alignment: 4 1121 exposesReturnsTwice: false 1122 legalized: false 1123 regBankSelected: false 1124 selected: false 1125 tracksRegLiveness: true 1126 registers: 1127 - { id: 0, class: g8rc, preferred-register: '' } 1128 - { id: 1, class: g8rc, preferred-register: '' } 1129 - { id: 2, class: gprc, preferred-register: '' } 1130 - { id: 3, class: g8rc, preferred-register: '' } 1131 liveins: 1132 - { reg: '$x3', virtual-reg: '%0' } 1133 - { reg: '$x4', virtual-reg: '%1' } 1134 frameInfo: 1135 isFrameAddressTaken: false 1136 isReturnAddressTaken: false 1137 hasStackMap: false 1138 hasPatchPoint: false 1139 stackSize: 0 1140 offsetAdjustment: 0 1141 maxAlignment: 0 1142 adjustsStack: false 1143 hasCalls: false 1144 stackProtector: '' 1145 maxCallFrameSize: 4294967295 1146 hasOpaqueSPAdjustment: false 1147 hasVAStart: false 1148 hasMustTailInVarArgFunc: false 1149 savePoint: '' 1150 restorePoint: '' 1151 fixedStack: 1152 stack: 1153 constants: 1154 body: | 1155 bb.0.entry: 1156 liveins: $x3, $x4 1157 1158 %1 = COPY $x4 1159 %0 = COPY $x3 1160 %2 = LI 400 1161 %3 = SRD %0, killed %2 1162 ; CHECK: RLDICL %0, 48, 16 1163 ; CHECK-LATE: rldicl 3, 3, 48, 16 1164 $x3 = COPY %3 1165 BLR8 implicit $lr8, implicit $rm, implicit $x3 1166 1167 ... 1168 --- 1169 name: testSRDo 1170 # CHECK-ALL: name: testSRDo 1171 alignment: 4 1172 exposesReturnsTwice: false 1173 legalized: false 1174 regBankSelected: false 1175 selected: false 1176 tracksRegLiveness: true 1177 registers: 1178 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1179 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1180 - { id: 2, class: gprc, preferred-register: '' } 1181 - { id: 3, class: g8rc, preferred-register: '' } 1182 - { id: 4, class: crrc, preferred-register: '' } 1183 - { id: 5, class: g8rc, preferred-register: '' } 1184 liveins: 1185 - { reg: '$x3', virtual-reg: '%0' } 1186 - { reg: '$x4', virtual-reg: '%1' } 1187 frameInfo: 1188 isFrameAddressTaken: false 1189 isReturnAddressTaken: false 1190 hasStackMap: false 1191 hasPatchPoint: false 1192 stackSize: 0 1193 offsetAdjustment: 0 1194 maxAlignment: 0 1195 adjustsStack: false 1196 hasCalls: false 1197 stackProtector: '' 1198 maxCallFrameSize: 4294967295 1199 hasOpaqueSPAdjustment: false 1200 hasVAStart: false 1201 hasMustTailInVarArgFunc: false 1202 savePoint: '' 1203 restorePoint: '' 1204 fixedStack: 1205 stack: 1206 constants: 1207 body: | 1208 bb.0.entry: 1209 liveins: $x3, $x4 1210 1211 %1 = COPY $x4 1212 %0 = COPY $x3 1213 %2 = LI 64 1214 %3 = SRDo %0, killed %2, implicit-def $cr0 1215 ; CHECK: ANDIo8 %0, 0, implicit-def $cr0 1216 ; CHECK-LATE: andi. 5, 3, 0 1217 %4 = COPY killed $cr0 1218 %5 = ISEL8 %1, %0, %4.sub_eq 1219 $x3 = COPY %5 1220 BLR8 implicit $lr8, implicit $rm, implicit $x3 1221 1222 ... 1223 --- 1224 name: testSRAD 1225 # CHECK-ALL: name: testSRAD 1226 alignment: 4 1227 exposesReturnsTwice: false 1228 legalized: false 1229 regBankSelected: false 1230 selected: false 1231 tracksRegLiveness: true 1232 registers: 1233 - { id: 0, class: g8rc, preferred-register: '' } 1234 - { id: 1, class: g8rc, preferred-register: '' } 1235 - { id: 2, class: gprc, preferred-register: '' } 1236 - { id: 3, class: g8rc, preferred-register: '' } 1237 liveins: 1238 - { reg: '$x3', virtual-reg: '%0' } 1239 - { reg: '$x4', virtual-reg: '%1' } 1240 frameInfo: 1241 isFrameAddressTaken: false 1242 isReturnAddressTaken: false 1243 hasStackMap: false 1244 hasPatchPoint: false 1245 stackSize: 0 1246 offsetAdjustment: 0 1247 maxAlignment: 0 1248 adjustsStack: false 1249 hasCalls: false 1250 stackProtector: '' 1251 maxCallFrameSize: 4294967295 1252 hasOpaqueSPAdjustment: false 1253 hasVAStart: false 1254 hasMustTailInVarArgFunc: false 1255 savePoint: '' 1256 restorePoint: '' 1257 fixedStack: 1258 stack: 1259 constants: 1260 body: | 1261 bb.0.entry: 1262 liveins: $x3, $x4 1263 1264 %1 = COPY $x4 1265 %0 = COPY $x3 1266 %2 = LI -44 1267 %3 = SRAD %0, killed %2, implicit-def dead $carry 1268 ; CHECK: SRAD %0, killed %2, implicit-def dead $carry 1269 ; CHECK-LATE: srad 3, 3, 4 1270 $x3 = COPY %3 1271 BLR8 implicit $lr8, implicit $rm, implicit $x3 1272 1273 ... 1274 --- 1275 name: testSRADo 1276 # CHECK-ALL: name: testSRADo 1277 alignment: 4 1278 exposesReturnsTwice: false 1279 legalized: false 1280 regBankSelected: false 1281 selected: false 1282 tracksRegLiveness: true 1283 registers: 1284 - { id: 0, class: g8rc, preferred-register: '' } 1285 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1286 - { id: 2, class: gprc, preferred-register: '' } 1287 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1288 - { id: 4, class: crrc, preferred-register: '' } 1289 - { id: 5, class: g8rc, preferred-register: '' } 1290 liveins: 1291 - { reg: '$x3', virtual-reg: '%0' } 1292 - { reg: '$x4', virtual-reg: '%1' } 1293 frameInfo: 1294 isFrameAddressTaken: false 1295 isReturnAddressTaken: false 1296 hasStackMap: false 1297 hasPatchPoint: false 1298 stackSize: 0 1299 offsetAdjustment: 0 1300 maxAlignment: 0 1301 adjustsStack: false 1302 hasCalls: false 1303 stackProtector: '' 1304 maxCallFrameSize: 4294967295 1305 hasOpaqueSPAdjustment: false 1306 hasVAStart: false 1307 hasMustTailInVarArgFunc: false 1308 savePoint: '' 1309 restorePoint: '' 1310 fixedStack: 1311 stack: 1312 constants: 1313 body: | 1314 bb.0.entry: 1315 liveins: $x3, $x4 1316 1317 %1 = COPY $x4 1318 %0 = COPY $x3 1319 %2 = LI 68 1320 %3 = SRADo %0, killed %2, implicit-def dead $carry, implicit-def $cr0 1321 ; CHECK: SRADo %0, killed %2, implicit-def dead $carry, implicit-def $cr0 1322 ; CHECK-LATE: srad. 3, 3, 5 1323 %4 = COPY killed $cr0 1324 %5 = ISEL8 %1, %3, %4.sub_eq 1325 $x3 = COPY %5 1326 BLR8 implicit $lr8, implicit $rm, implicit $x3 1327 1328 ... 1329 --- 1330
