1 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s 2 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -mcpu=a2q < %s | FileCheck %s --check-prefix=QPX 3 4 declare float @fabsf(float) 5 6 declare float @fminf(float, float) 7 declare double @fmin(double, double) 8 declare float @llvm.minnum.f32(float, float) 9 declare double @llvm.minnum.f64(double, double) 10 11 declare float @fmaxf(float, float) 12 declare double @fmax(double, double) 13 declare float @llvm.maxnum.f32(float, float) 14 declare double @llvm.maxnum.f64(double, double) 15 16 declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>) 17 declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>) 18 declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>) 19 declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>) 20 21 define void @test1(float %f, float* %fp) { 22 entry: 23 br label %loop_body 24 25 loop_body: 26 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 27 %0 = call float @llvm.minnum.f32(float %f, float 1.0) 28 store float %0, float* %fp, align 4 29 %1 = add i64 %invar_address.dim.0.01, 1 30 %2 = icmp eq i64 %1, 2 31 br i1 %2, label %loop_exit, label %loop_body 32 33 loop_exit: 34 ret void 35 } 36 37 ; CHECK-LABEL: test1: 38 ; CHECK-NOT: mtctr 39 ; CHECK: bl fminf 40 ; CHECK-NOT: bl fminf 41 ; CHECK-NOT: mtctr 42 ; CHECK: blr 43 44 define void @test1v(<4 x float> %f, <4 x float>* %fp) { 45 entry: 46 br label %loop_body 47 48 loop_body: 49 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 50 %0 = call <4 x float> @llvm.minnum.v4f32(<4 x float> %f, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>) 51 store <4 x float> %0, <4 x float>* %fp, align 16 52 %1 = add i64 %invar_address.dim.0.01, 1 53 %2 = icmp eq i64 %1, 4 54 br i1 %2, label %loop_exit, label %loop_body 55 56 loop_exit: 57 ret void 58 } 59 60 ; CHECK-LABEL: test1v: 61 ; CHECK: bl fminf 62 ; CHECK-NOT: mtctr 63 ; CHECK: bl fminf 64 ; CHECK-NOT: mtctr 65 ; CHECK: bl fminf 66 ; CHECK-NOT: mtctr 67 ; CHECK: bl fminf 68 ; CHECK-NOT: bl fminf 69 ; CHECK: blr 70 71 ; QPX-LABEL: test1v: 72 ; QPX: mtctr 73 ; QPX-NOT: bl fminf 74 ; QPX: blr 75 76 define void @test1a(float %f, float* %fp) { 77 entry: 78 br label %loop_body 79 80 loop_body: 81 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 82 %0 = call float @fminf(float %f, float 1.0) readnone 83 store float %0, float* %fp, align 4 84 %1 = add i64 %invar_address.dim.0.01, 1 85 %2 = icmp eq i64 %1, 2 86 br i1 %2, label %loop_exit, label %loop_body 87 88 loop_exit: 89 ret void 90 } 91 92 ; CHECK-LABEL: test1a: 93 ; CHECK-NOT: mtctr 94 ; CHECK: bl fminf 95 ; CHECK-NOT: bl fminf 96 ; CHECK-NOT: mtctr 97 ; CHECK: blr 98 99 define void @test2(float %f, float* %fp) { 100 entry: 101 br label %loop_body 102 103 loop_body: 104 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 105 %0 = call float @llvm.maxnum.f32(float %f, float 1.0) 106 store float %0, float* %fp, align 4 107 %1 = add i64 %invar_address.dim.0.01, 1 108 %2 = icmp eq i64 %1, 2 109 br i1 %2, label %loop_exit, label %loop_body 110 111 loop_exit: 112 ret void 113 } 114 115 ; CHECK-LABEL: test2: 116 ; CHECK-NOT: mtctr 117 ; CHECK: bl fmaxf 118 ; CHECK-NOT: bl fmaxf 119 ; CHECK-NOT: mtctr 120 ; CHECK: blr 121 122 define void @test2v(<4 x double> %f, <4 x double>* %fp) { 123 entry: 124 br label %loop_body 125 126 loop_body: 127 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 128 %0 = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %f, <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>) 129 store <4 x double> %0, <4 x double>* %fp, align 16 130 %1 = add i64 %invar_address.dim.0.01, 1 131 %2 = icmp eq i64 %1, 4 132 br i1 %2, label %loop_exit, label %loop_body 133 134 loop_exit: 135 ret void 136 } 137 138 ; CHECK-LABEL: test2v: 139 ; CHECK: bl fmax 140 ; CHECK-NOT: mtctr 141 ; CHECK: bl fmax 142 ; CHECK-NOT: mtctr 143 ; CHECK: bl fmax 144 ; CHECK-NOT: mtctr 145 ; CHECK: bl fmax 146 ; CHECK-NOT: bl fmax 147 ; CHECK: blr 148 149 ; QPX-LABEL: test2v: 150 ; QPX: mtctr 151 ; QPX-NOT: bl fmax 152 ; QPX: blr 153 154 define void @test2a(float %f, float* %fp) { 155 entry: 156 br label %loop_body 157 158 loop_body: 159 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 160 %0 = call float @fmaxf(float %f, float 1.0) readnone 161 store float %0, float* %fp, align 4 162 %1 = add i64 %invar_address.dim.0.01, 1 163 %2 = icmp eq i64 %1, 2 164 br i1 %2, label %loop_exit, label %loop_body 165 166 loop_exit: 167 ret void 168 } 169 170 ; CHECK-LABEL: test2a: 171 ; CHECK-NOT: mtctr 172 ; CHECK: bl fmaxf 173 ; CHECK-NOT: bl fmaxf 174 ; CHECK-NOT: mtctr 175 ; CHECK: blr 176 177 define void @test3(double %f, double* %fp) { 178 entry: 179 br label %loop_body 180 181 loop_body: 182 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 183 %0 = call double @llvm.minnum.f64(double %f, double 1.0) 184 store double %0, double* %fp, align 8 185 %1 = add i64 %invar_address.dim.0.01, 1 186 %2 = icmp eq i64 %1, 2 187 br i1 %2, label %loop_exit, label %loop_body 188 189 loop_exit: 190 ret void 191 } 192 193 ; CHECK-LABEL: test3: 194 ; CHECK-NOT: mtctr 195 ; CHECK: bl fmin 196 ; CHECK-NOT: bl fmin 197 ; CHECK-NOT: mtctr 198 ; CHECK: blr 199 200 define void @test3a(double %f, double* %fp) { 201 entry: 202 br label %loop_body 203 204 loop_body: 205 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 206 %0 = call double @fmin(double %f, double 1.0) readnone 207 store double %0, double* %fp, align 8 208 %1 = add i64 %invar_address.dim.0.01, 1 209 %2 = icmp eq i64 %1, 2 210 br i1 %2, label %loop_exit, label %loop_body 211 212 loop_exit: 213 ret void 214 } 215 216 ; CHECK-LABEL: test3a: 217 ; CHECK-NOT: mtctr 218 ; CHECK: bl fmin 219 ; CHECK-NOT: bl fmin 220 ; CHECK-NOT: mtctr 221 ; CHECK: blr 222 223 define void @test4(double %f, double* %fp) { 224 entry: 225 br label %loop_body 226 227 loop_body: 228 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 229 %0 = call double @llvm.maxnum.f64(double %f, double 1.0) 230 store double %0, double* %fp, align 8 231 %1 = add i64 %invar_address.dim.0.01, 1 232 %2 = icmp eq i64 %1, 2 233 br i1 %2, label %loop_exit, label %loop_body 234 235 loop_exit: 236 ret void 237 } 238 239 ; CHECK-LABEL: test4: 240 ; CHECK-NOT: mtctr 241 ; CHECK: bl fmax 242 ; CHECK-NOT: bl fmax 243 ; CHECK-NOT: mtctr 244 ; CHECK: blr 245 246 define void @test4a(double %f, double* %fp) { 247 entry: 248 br label %loop_body 249 250 loop_body: 251 %invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ] 252 %0 = call double @fmax(double %f, double 1.0) readnone 253 store double %0, double* %fp, align 8 254 %1 = add i64 %invar_address.dim.0.01, 1 255 %2 = icmp eq i64 %1, 2 256 br i1 %2, label %loop_exit, label %loop_body 257 258 loop_exit: 259 ret void 260 } 261 262 ; CHECK-LABEL: test4a: 263 ; CHECK-NOT: mtctr 264 ; CHECK: bl fmax 265 ; CHECK-NOT: bl fmax 266 ; CHECK-NOT: mtctr 267 ; CHECK: blr 268 269
