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      1 ; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
      2 ; RUN:   -enable-ppc-quad-precision -verify-machineinstrs \
      3 ; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
      4 
      5 @a_qp = common global fp128 0xL00000000000000000000000000000000, align 16
      6 @b_qp = common global fp128 0xL00000000000000000000000000000000, align 16
      7 
      8 ; Function Attrs: noinline nounwind optnone
      9 define signext i32 @greater_qp() {
     10 entry:
     11   %0 = load fp128, fp128* @a_qp, align 16
     12   %1 = load fp128, fp128* @b_qp, align 16
     13   %cmp = fcmp ogt fp128 %0, %1
     14   %conv = zext i1 %cmp to i32
     15   ret i32 %conv
     16 ; CHECK-LABEL: greater_qp
     17 ; CHECK: xscmpuqp
     18 ; CHECK: isel r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, gt
     19 ; CHECK: blr
     20 }
     21 
     22 ; Function Attrs: noinline nounwind optnone
     23 define signext i32 @less_qp() {
     24 entry:
     25   %0 = load fp128, fp128* @a_qp, align 16
     26   %1 = load fp128, fp128* @b_qp, align 16
     27   %cmp = fcmp olt fp128 %0, %1
     28   %conv = zext i1 %cmp to i32
     29   ret i32 %conv
     30 ; CHECK-LABEL: less_qp
     31 ; CHECK: xscmpuqp
     32 ; CHECK: isel r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, lt
     33 ; CHECK: blr
     34 }
     35 
     36 ; Function Attrs: noinline nounwind optnone
     37 define signext i32 @greater_eq_qp() {
     38 entry:
     39   %0 = load fp128, fp128* @a_qp, align 16
     40   %1 = load fp128, fp128* @b_qp, align 16
     41   %cmp = fcmp oge fp128 %0, %1
     42   %conv = zext i1 %cmp to i32
     43   ret i32 %conv
     44 ; CHECK-LABEL: greater_eq_qp
     45 ; CHECK: xscmpuqp
     46 ; CHECK: cror 4*cr[[REG:[0-9]+]]+lt, un, lt
     47 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
     48 ; CHECK: blr
     49 }
     50 
     51 ; Function Attrs: noinline nounwind optnone
     52 define signext i32 @less_eq_qp() {
     53 entry:
     54   %0 = load fp128, fp128* @a_qp, align 16
     55   %1 = load fp128, fp128* @b_qp, align 16
     56   %cmp = fcmp ole fp128 %0, %1
     57   %conv = zext i1 %cmp to i32
     58   ret i32 %conv
     59 ; CHECK-LABEL: less_eq_qp
     60 ; CHECK: xscmpuqp
     61 ; CHECK: cror 4*cr[[REG:[0-9]+]]+lt, un, gt
     62 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
     63 ; CHECK: blr
     64 }
     65 
     66 ; Function Attrs: noinline nounwind optnone
     67 define signext i32 @equal_qp() {
     68 entry:
     69   %0 = load fp128, fp128* @a_qp, align 16
     70   %1 = load fp128, fp128* @b_qp, align 16
     71   %cmp = fcmp oeq fp128 %0, %1
     72   %conv = zext i1 %cmp to i32
     73   ret i32 %conv
     74 ; CHECK-LABEL: equal_qp
     75 ; CHECK: xscmpuqp
     76 ; CHECK: isel r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, eq
     77 ; CHECK: blr
     78 }
     79 
     80 ; Function Attrs: noinline nounwind optnone
     81 define signext i32 @not_greater_qp() {
     82 entry:
     83   %0 = load fp128, fp128* @a_qp, align 16
     84   %1 = load fp128, fp128* @b_qp, align 16
     85   %cmp = fcmp ogt fp128 %0, %1
     86   %lnot = xor i1 %cmp, true
     87   %lnot.ext = zext i1 %lnot to i32
     88   ret i32 %lnot.ext
     89 ; CHECK-LABEL: not_greater_qp
     90 ; CHECK: xscmpuqp
     91 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, gt
     92 ; CHECK: blr
     93 }
     94 
     95 ; Function Attrs: noinline nounwind optnone
     96 define signext i32 @not_less_qp() {
     97 entry:
     98   %0 = load fp128, fp128* @a_qp, align 16
     99   %1 = load fp128, fp128* @b_qp, align 16
    100   %cmp = fcmp olt fp128 %0, %1
    101   %lnot = xor i1 %cmp, true
    102   %lnot.ext = zext i1 %lnot to i32
    103   ret i32 %lnot.ext
    104 ; CHECK-LABEL: not_less_qp
    105 ; CHECK: xscmpuqp
    106 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, lt
    107 ; CHECK: blr
    108 }
    109 
    110 ; Function Attrs: noinline nounwind optnone
    111 define signext i32 @not_greater_eq_qp() {
    112 entry:
    113   %0 = load fp128, fp128* @a_qp, align 16
    114   %1 = load fp128, fp128* @b_qp, align 16
    115   %cmp = fcmp oge fp128 %0, %1
    116   %lnot = xor i1 %cmp, true
    117   %lnot.ext = zext i1 %lnot to i32
    118   ret i32 %lnot.ext
    119 ; CHECK-LABEL: not_greater_eq_qp
    120 ; CHECK: xscmpuqp
    121 ; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, lt, un
    122 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
    123 ; CHECK: blr
    124 }
    125 
    126 ; Function Attrs: noinline nounwind optnone
    127 define signext i32 @not_less_eq_qp() {
    128 entry:
    129   %0 = load fp128, fp128* @a_qp, align 16
    130   %1 = load fp128, fp128* @b_qp, align 16
    131   %cmp = fcmp ole fp128 %0, %1
    132   %lnot = xor i1 %cmp, true
    133   %lnot.ext = zext i1 %lnot to i32
    134   ret i32 %lnot.ext
    135 ; CHECK-LABEL: not_less_eq_qp
    136 ; CHECK: xscmpuqp
    137 ; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, gt, un
    138 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
    139 ; CHECK: blr
    140 }
    141 
    142 ; Function Attrs: noinline nounwind optnone
    143 define signext i32 @not_equal_qp() {
    144 entry:
    145   %0 = load fp128, fp128* @a_qp, align 16
    146   %1 = load fp128, fp128* @b_qp, align 16
    147   %cmp = fcmp une fp128 %0, %1
    148   %conv = zext i1 %cmp to i32
    149   ret i32 %conv
    150 ; CHECK-LABEL: not_equal_qp
    151 ; CHECK: xscmpuqp
    152 ; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, eq
    153 ; CHECK: blr
    154 }
    155 
    156 ; Function Attrs: norecurse nounwind readonly
    157 define fp128 @greater_sel_qp() {
    158 entry:
    159   %0 = load fp128, fp128* @a_qp, align 16
    160   %1 = load fp128, fp128* @b_qp, align 16
    161   %cmp = fcmp ogt fp128 %0, %1
    162   %cond = select i1 %cmp, fp128 %0, fp128 %1
    163   ret fp128 %cond
    164 ; CHECK-LABEL: greater_sel_qp
    165 ; CHECK: xscmpuqp cr[[REG:[0-9]+]]
    166 ; CHECK: bgtlr cr[[REG]]
    167 ; CHECK: blr
    168 }
    169 
    170 ; Function Attrs: noinline nounwind optnone
    171 define fp128 @less_sel_qp() {
    172 entry:
    173   %0 = load fp128, fp128* @a_qp, align 16
    174   %1 = load fp128, fp128* @b_qp, align 16
    175   %cmp = fcmp olt fp128 %0, %1
    176   %cond = select i1 %cmp, fp128 %0, fp128 %1
    177   ret fp128 %cond
    178 ; CHECK-LABEL: less_sel_qp
    179 ; CHECK: xscmpuqp cr[[REG:[0-9]+]]
    180 ; CHECK: bltlr cr[[REG]]
    181 ; CHECK: blr
    182 }
    183 
    184 ; Function Attrs: noinline nounwind optnone
    185 define fp128 @greater_eq_sel_qp() {
    186 entry:
    187   %0 = load fp128, fp128* @a_qp, align 16
    188   %1 = load fp128, fp128* @b_qp, align 16
    189   %cmp = fcmp oge fp128 %0, %1
    190   %cond = select i1 %cmp, fp128 %0, fp128 %1
    191   ret fp128 %cond
    192 ; CHECK-LABEL: greater_eq_sel_qp
    193 ; CHECK: xscmpuqp
    194 ; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, un, lt
    195 ; CHECK: bclr {{[0-9]+}}, 4*cr[[REG]]+lt, 0
    196 ; CHECK: blr
    197 }
    198 
    199 ; Function Attrs: noinline nounwind optnone
    200 define fp128 @less_eq_sel_qp() {
    201 entry:
    202   %0 = load fp128, fp128* @a_qp, align 16
    203   %1 = load fp128, fp128* @b_qp, align 16
    204   %cmp = fcmp ole fp128 %0, %1
    205   %cond = select i1 %cmp, fp128 %0, fp128 %1
    206   ret fp128 %cond
    207 ; CHECK-LABEL: less_eq_sel_qp
    208 ; CHECK: xscmpuqp
    209 ; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, un, gt
    210 ; CHECK: bclr {{[0-9]+}}, 4*cr[[REG]]+lt, 0
    211 ; CHECK: blr
    212 }
    213 
    214 ; Function Attrs: noinline nounwind optnone
    215 define fp128 @equal_sel_qp() {
    216 entry:
    217   %0 = load fp128, fp128* @a_qp, align 16
    218   %1 = load fp128, fp128* @b_qp, align 16
    219   %cmp = fcmp oeq fp128 %0, %1
    220   %cond = select i1 %cmp, fp128 %0, fp128 %1
    221   ret fp128 %cond
    222 ; CHECK-LABEL: equal_sel_qp
    223 ; CHECK: xscmpuqp cr[[REG:[0-9]+]]
    224 ; CHECK: beqlr cr[[REG]]
    225 ; CHECK: blr
    226 }
    227