1 ; RUN: llc -O3 -o - %s | FileCheck %s 2 target datalayout = "e-m:e-i64:64-n32:64" 3 target triple = "powerpc64le-unknown-linux-gnu" 4 5 %class1 = type { %union1 } 6 %union1 = type { i64, [24 x i8] } 7 %class2 = type { %class3 } 8 %class3 = type { %class4 } 9 %class4 = type { %class5, i64, %union.anon } 10 %class5 = type { i8* } 11 %union.anon = type { i64, [8 x i8] } 12 13 @ext = external global %"class1", align 8 14 15 ; We can't select lxv for this because even though we're accessing an offset of 16 ; 16 from the stack slot, the stack slot is only guaranteed to be 8-byte 17 ; aligned. When the frame is finalized it is converted to lxv (frame-reg) + 18 ; (offset + 16). Because offset isn't guaranteed to be 16-byte aligned, we may 19 ; end up needing to translate the lxv instruction to lxvx 20 ; CHECK-LABEL: unaligned_slot: 21 ; CHECK-NOT: lxv {{[0-9]+}}, {{[-0-9]+}}({{[0-9]+}}) 22 ; CHECK: blr 23 define void @unaligned_slot() #0 { 24 %1 = alloca %class2, align 8 25 %2 = getelementptr inbounds %class2, %class2* %1, i64 0, i32 0, i32 0, i32 2 26 %3 = bitcast %union.anon* %2 to i8* 27 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 nonnull getelementptr inbounds (%class1, %class1* @ext, i64 0, i32 0, i32 1, i64 8), i8* align 8 nonnull %3, i64 16, i1 false) #2 28 ret void 29 } 30 ; CHECK-LABEL: aligned_slot: 31 ; CHECK: lxv {{[0-9]+}}, {{[-0-9]+}}({{[0-9]+}}) 32 ; CHECK: blr 33 define void @aligned_slot() #0 { 34 %1 = alloca %class2, align 16 35 %2 = getelementptr inbounds %class2, %class2* %1, i64 0, i32 0, i32 0, i32 2 36 %3 = bitcast %union.anon* %2 to i8* 37 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 nonnull getelementptr inbounds (%class1, %class1* @ext, i64 0, i32 0, i32 1, i64 8), i8* align 8 nonnull %3, i64 16, i1 false) #2 38 ret void 39 } 40 41 ; Function Attrs: argmemonly nounwind 42 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #1 43 44 attributes #0 = { nounwind "target-cpu"="pwr9" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" } 45 attributes #1 = { argmemonly nounwind } 46 attributes #2 = { nounwind } 47
